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<title>u-boot.git/drivers/phy, branch v2021.10-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/phy?h=v2021.10-rc2</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/phy?h=v2021.10-rc2'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2021-07-29T12:20:06Z</updated>
<entry>
<title>Merge tag 'ti-v2021.10-rc2' of https://source.denx.de/u-boot/custodians/u-boot-ti</title>
<updated>2021-07-29T12:20:06Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-07-29T12:20:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=38436abd5e58044eccddbcd7ec3610a9104e86b6'/>
<id>urn:sha1:38436abd5e58044eccddbcd7ec3610a9104e86b6</id>
<content type='text'>
- Add MMC High speed modes for AM64 and J7200
- Add Sierra/Torrent SERDES driver
- Minor clean-ups for R5F boot from SPL
</content>
</entry>
<entry>
<title>Makefile: Move phy rules into drivers/phy</title>
<updated>2021-07-28T18:27:54Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-07-11T03:14:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9d910b76f70166b7b0b271710a92eaa289b011c6'/>
<id>urn:sha1:9d910b76f70166b7b0b271710a92eaa289b011c6</id>
<content type='text'>
These don't belong in the drivers Makefile so move them down into
the correct place.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Fixup some missing dependencies this exposed]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>phy: meson-axg-mipi: Access parent ofnode through dev_ofnode()</title>
<updated>2021-07-27T08:32:09Z</updated>
<author>
<name>Alper Nebi Yasak</name>
<email>alpernebiyasak@gmail.com</email>
</author>
<published>2021-05-14T20:54:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a3f1eaa793a1b25a113e2814451b5795954fbb17'/>
<id>urn:sha1:a3f1eaa793a1b25a113e2814451b5795954fbb17</id>
<content type='text'>
With commit 84a42ae36683 ("dm: core: Rename device node to indicate it
is private") and commit f10643cf8a4c ("dm: core: Access device ofnode
through functions") accesses to the "node" member were replaced with
dev_ofnode(). Also apply that replacement here.

Fixes: 4547551aa019 ("phy: Add Amlogic AXG MIPI PCIe Analog PHY driver")
Signed-off-by: Alper Nebi Yasak &lt;alpernebiyasak@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
</content>
</entry>
<entry>
<title>phy: meson-axg-mipi: Rename "priv_auto_alloc_size" to "priv_auto"</title>
<updated>2021-07-27T08:32:09Z</updated>
<author>
<name>Alper Nebi Yasak</name>
<email>alpernebiyasak@gmail.com</email>
</author>
<published>2021-05-14T20:54:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a41862d25e10c2476ba8810222bf77b50bd17ec3'/>
<id>urn:sha1:a41862d25e10c2476ba8810222bf77b50bd17ec3</id>
<content type='text'>
With commit 41575d8e4c33 ("dm: treewide: Rename auto_alloc_size members
to be shorter") "priv_auto_alloc_size" was renamed to "priv_auto". Apply
the rename to these two drivers as well.

Fixes: 4547551aa019 ("phy: Add Amlogic AXG MIPI PCIe Analog PHY driver")
Fixes: 7ef19503bacf ("phy: Add Amlogic AXG MIPI D-PHY driver")
Signed-off-by: Alper Nebi Yasak &lt;alpernebiyasak@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
</content>
</entry>
<entry>
<title>phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC</title>
<updated>2021-07-27T05:27:12Z</updated>
<author>
<name>Jean-Jacques Hiblot</name>
<email>jjhiblot@ti.com</email>
</author>
<published>2021-07-21T15:58:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1a83f9931e052168c225033d9c642112142dab70'/>
<id>urn:sha1:1a83f9931e052168c225033d9c642112142dab70</id>
<content type='text'>
Add support for WIZ module present in TI's J721E SoC. WIZ is a SERDES
wrapper used to configure some of the input signals to the SERDES. It is
used with both Sierra(16G) and Torrent(10G) SERDES. This driver configures
three clock selects (pll0, pll1, dig) and supports resets for each of the
lanes.

This is an adaptation of the linux driver.

Signed-off-by: Jean-Jacques Hiblot &lt;jjhiblot@ti.com&gt;
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210721155849.20994-10-kishon@ti.com
</content>
</entry>
<entry>
<title>phy: cadence: Add driver for Torrent SERDES</title>
<updated>2021-07-27T05:27:12Z</updated>
<author>
<name>Aswath Govindraju</name>
<email>a-govindraju@ti.com</email>
</author>
<published>2021-07-21T15:58:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=193c7351624c318a75058df984e0cf653a8498ad'/>
<id>urn:sha1:193c7351624c318a75058df984e0cf653a8498ad</id>
<content type='text'>
Add driver for Torrent SERDES.

Signed-off-by: Aswath Govindraju &lt;a-govindraju@ti.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210721155849.20994-9-kishon@ti.com
</content>
</entry>
<entry>
<title>phy: cadence: Add driver for Sierra PHY</title>
<updated>2021-07-27T05:27:12Z</updated>
<author>
<name>Alan Douglas</name>
<email>adouglas@cadence.com</email>
</author>
<published>2021-07-21T15:58:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=39b823381d9d27537c032010bdaf005aa60df9a3'/>
<id>urn:sha1:39b823381d9d27537c032010bdaf005aa60df9a3</id>
<content type='text'>
Add a Sierra PHY driver with PCIe and USB support.
This driver is a port from the mainline linux driver.

The PHY has multiple lanes, which can be configured into
groups, and a generic PHY device is created for each group.

There are two resets controlling the overall PHY block, one
to enable the APB interface for programming registers, and
another to enable the PHY itself.  Additionally there are
resets for each PHY lane.

The PHY can be configured in hardware to read register
settings from ROM, or they can be written by the driver.

The sequence of operation on startup is to enable the APB
bus, write the PHY registers (if required)  for each lane
group, and then enable the PHY.  Each group of lanes
can then be individually controlled using the power_on()/
power_off() function for that generic PHY

One difference with the linux driver is that the PHY is
always reset after it is powered-on. This is because role
switching is not supported in u-boot and the cable
orientation is handled by the PHY reset.

Signed-off-by: Jean-Jacques Hiblot &lt;jjhiblot@ti.com&gt;
Signed-off-by: Alan Douglas &lt;adouglas@cadence.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210721155849.20994-8-kishon@ti.com
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-20210717' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx</title>
<updated>2021-07-17T14:52:21Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-07-17T14:52:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d5dbc661c3041e910e161a95fca9e615d85730ac'/>
<id>urn:sha1:d5dbc661c3041e910e161a95fca9e615d85730ac</id>
<content type='text'>
i.MX
----

- mx7ulp : fix  WDOG
- imx8 : Phytec
- USB3 support for i.MX8

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/8277
</content>
</entry>
<entry>
<title>phy: phy-imx8mq-usb: Add USB PHY driver for i.MX8MQ</title>
<updated>2021-07-17T11:12:23Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2021-02-21T16:26:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4266dc1dffc173099966d7e2e0cdf959c93800b8'/>
<id>urn:sha1:4266dc1dffc173099966d7e2e0cdf959c93800b8</id>
<content type='text'>
Add the USB PHY driver for i.MX8MQ to work with DWC3 USB controller.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Reviewed-by: Patrick Wildt &lt;patrick@blueri.se&gt;
Tested-by: Patrick Wildt &lt;patrick@blueri.se&gt;
</content>
</entry>
<entry>
<title>phy: Add driver for ST-Ericsson AB8500 USB PHY</title>
<updated>2021-07-14T20:48:15Z</updated>
<author>
<name>Stephan Gerhold</name>
<email>stephan@gerhold.net</email>
</author>
<published>2021-07-08T18:33:49Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4559df9e8160ae1b78bbfe2e90cda574ffa08317'/>
<id>urn:sha1:4559df9e8160ae1b78bbfe2e90cda574ffa08317</id>
<content type='text'>
The AB8500 PMIC contains an USB PHY that needs to be set up in
device or host mode to make USB work properly. Add a simple driver
for the generic PHY uclass that allows enabling it.

The if (CONFIG_IS_ENABLED(USB_MUSB_HOST)) might be a bit strange.
The USB PHY must be configured in either host or device mode and
somehow the USB PHY driver must be made aware of the mode.

Actually, the MUSB driver used together with this PHY does not
support dynamic selection of host/device mode in U-Boot at the moment.
Therefore, one very simple approach that works fine is to select
the mode to configure at compile time. When the MUSB driver is
configured in host mode the PHY is configured in host mode, and
similarly when the MUSB driver is configured in device/gadget mode.

Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Stephan Gerhold &lt;stephan@gerhold.net&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
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