u-boot.git/drivers/phy, branch v2022.07 Unnamed repository; edit this file 'description' to name the repository. sunxi: usb: convert PHY GPIO functions to DM 2022-06-26T10:22:53+00:00 Andre Przywara andre.przywara@arm.com 2022-06-07T22:36:18+00:00 3c0b9adb898d7abed97707a852d9a074dd68cbea The Allwinner USB PHY driver is still using the legacy GPIO interface, which is now implemented by the DM_GPIO compat functions. Those seem to have some design flaws, as setting the direction, then later setting the value will not work, if the DM_GPIO driver is implementing set_flags. Fix this by using the dm_ version of the direct GPIO interface, which uses struct gpio_desc structs to handle requested GPIOs, and actually keeps the flags we set earlier. This fixes USB operation on boards which need to toggle the VBUS supply via a GPIO, like the Teres-I laptop or the BananaPi M2 Berry board. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reported-by: Milan P. Stanić <mps@arvanta.net> Reviewed-by: Samuel Holland <samuel@sholland.org> 
The Allwinner USB PHY driver is still using the legacy GPIO interface,
which is now implemented by the DM_GPIO compat functions.
Those seem to have some design flaws, as setting the direction, then
later setting the value will not work, if the DM_GPIO driver is
implementing set_flags.

Fix this by using the dm_ version of the direct GPIO interface, which
uses struct gpio_desc structs to handle requested GPIOs, and actually
keeps the flags we set earlier.

This fixes USB operation on boards which need to toggle the VBUS supply
via a GPIO, like the Teres-I laptop or the BananaPi M2 Berry board.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Milan P. Stanić <mps@arvanta.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
phy: zynqmp: Increase timeout value to 10ms 2022-05-18T11:17:54+00:00 Ashok Reddy Soma ashok.reddy.soma@xilinx.com 2022-05-10T13:12:34+00:00 e9869f474c35b81577066441dce6960c03089023 Observing psgtr pll timeouts with some usb hubs and devices behind it. Increase timeout to 10ms to take care of it. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/20220510131234.2650-1-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com> 
Observing psgtr pll timeouts with some usb hubs and devices behind it.
Increase timeout to 10ms to take care of it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220510131234.2650-1-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
phy: stm32-usbphyc: stm32-usbphyc: Add DT phy tuning support 2022-05-10T11:56:07+00:00 Patrice Chotard patrice.chotard@foss.st.com 2022-04-22T07:39:00+00:00 da6473c0d458c070c74a55c23f9fb26a1c8a0efd Add support of phy-tuning properties for sm32-usbphyc's phy tuning aligned with v5.15 kernel bindings. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> 
Add support of phy-tuning properties for sm32-usbphyc's phy tuning
aligned with v5.15 kernel bindings.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
phy: phy-imx8mq-usb: Add support for i.MX8MP USB PHY 2022-04-12T15:33:56+00:00 Marek Vasut marex@denx.de 2022-04-01T01:18:31+00:00 77ee5d35080450ce41245955b950989e52f146e3 Add initial support for i.MX8MP USB PHY, i.MX8MP USB is similar to the i.MX8MQ, except for clock and power domain design customization. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx 
Add initial support for i.MX8MP USB PHY, i.MX8MP USB is similar to
the i.MX8MQ, except for clock and power domain design customization.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
phy: bcm63xx: Don't check clk_free 2022-03-30T17:02:55+00:00 Sean Anderson seanga2@gmail.com 2022-01-15T22:25:01+00:00 ad20358c7462159d5f9012facba9dec1e197aaca This function always succeeds, so don't check its return value. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20220115222504.617013-5-seanga2@gmail.com 
This function always succeeds, so don't check its return value.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220115222504.617013-5-seanga2@gmail.com
phy: cadence: Sierra: Move the link operations from serdes phy to link device 2022-03-14T16:44:51+00:00 Aswath Govindraju a-govindraju@ti.com 2022-03-04T12:15:25+00:00 b78f81eb5d6ef45cfba8cc6a155da7fc661b420f In commit 6f46c7441a9f ("phy: cadence: Sierra: Add a UCLASS_PHY device for links"), a separate udevice of type UCLASS_PHY was created for each link. Therefore, move the corresponding link operations under the link device. Also, change the uclass of sierra phy to UCLASS_MISC as it is no longer the phy device. Fixes: 6f46c7441a9f ("phy: cadence: Sierra: Add a UCLASS_PHY device for links") Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Georgi Vlaev <g-vlaev@ti.com> 
In commit 6f46c7441a9f ("phy: cadence: Sierra: Add a UCLASS_PHY device for
links"), a separate udevice of type UCLASS_PHY was created for each link.
Therefore, move the corresponding link operations under the link device.

Also, change the uclass of sierra phy to UCLASS_MISC as it is no longer the
phy device.

Fixes: 6f46c7441a9f ("phy: cadence: Sierra: Add a UCLASS_PHY device for links")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Georgi Vlaev <g-vlaev@ti.com>
phy: nop-phy: Fix phy reset if no reset-gpio defined 2022-02-28T23:21:11+00:00 Tim Harvey tharvey@gateworks.com 2022-02-28T22:53:21+00:00 a41b88ec02ea1dbf4e5e6e895625a5fee96097c5 Ensure there is a valid reset-gpio defined before using it. Fixes: f9852acdce02 ("phy: nop-phy: Fix enabling reset") Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> 
Ensure there is a valid reset-gpio defined before using it.

Fixes: f9852acdce02 ("phy: nop-phy: Fix enabling reset")
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
clk: Rename clk_get_optional_nodev 2022-02-25T04:58:13+00:00 Sean Anderson seanga2@gmail.com 2021-12-22T17:11:10+00:00 011bbfbb304fc6554163df34fbe0d50b88ace968 This normalizes the name of this accessor function to put "_optional" last. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20211222171114.3091780-2-seanga2@gmail.com 
This normalizes the name of this accessor function to put "_optional" last.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20211222171114.3091780-2-seanga2@gmail.com
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb 2022-02-23T18:34:14+00:00 Tom Rini trini@konsulko.com 2022-02-23T18:34:14+00:00 90de95f7443cb06f014824976251f126ac6f71c0 - OMAP EHCI updates 
- OMAP EHCI updates
phy: nop-phy: Fix enabling reset 2022-02-23T04:25:17+00:00 Adam Ford aford173@gmail.com 2022-02-19T23:08:43+00:00 f9852acdce029edb8e1a06d1d5336b6d0a12471e The reset function should place the phy into reset, while the init function should take the phy out of reset. Currently the reset function takes it out of reset, and the init calls the reset. Signed-off-by: Adam Ford <aford173@gmail.com> 
The reset function should place the phy into reset, while the
init function should take the phy out of reset.  Currently the
reset function takes it out of reset, and the init calls the
reset.

Signed-off-by: Adam Ford <aford173@gmail.com>