u-boot.git/drivers/phy, branch v2023.01

phy: rockchip: handle clock without enable function

2022-12-19T02:56:12+00:00

If a clock doesn't supply the enable hook, clk_enable() will return
-ENOSYS.  In this case the clock is always enabled so there is no error
and the phy initialisation should continue.

Signed-off-by: John Keeping 
Reviewed-by: Kever Yang

phy: usbphyc: use regulator_set_enable_if_allowed for disabling vbus supply

2022-12-12T10:25:19+00:00

Use regulator_set_enable_if_allowed() api instead of regulator_set_enable()
while disabling vbus supply. This way the driver doesn't see an error
when it disable an always-on regulator for VBUS.

This patch is needed for STM32MP157C-DK2 board when the regulator
v3v3: buck4 used as the phy vbus supply in kernel device tree
is always on with the next hack for low power use-case:

&usbphyc_port0 {
        ...
	/*
	 * Hack to keep hub active until all connected devices are suspended
	 * otherwise the hub will be powered off as soon as the v3v3 is disabled
	 * and it can disturb connected devices.
	 */
	connector {
		compatible = "usb-a-connector";
		vbus-supply = <&v3v3>;
	};
};

Without this patch and the previous update in DT the command
"usb stop" failed and the next command "usb start" cause a crash.

Signed-off-by: Patrick Delaunay 
Reviewed-by: Patrice Chotard 
Reviewed-by: Marek Vasut

phy: ti: j721e-wiz: add j784s4-wiz-10g module support

2022-10-18T13:48:22+00:00

Add support for j784s4-wiz-10g device which has two core reference
clocks (e.g core_ref_clk, core_ref1_clk) which requires an additional
mux selection option.

Signed-off-by: Matt Ranostay

phy: Add generic_{setup,shutdown}_phy() helpers

2022-10-10T16:08:18+00:00

In drivers usb/host/{ehci,ohci}-generic.c, {ehci,ohci}_setup_phy() and
{ehci,ohci}_shutdown_phy() shares 95% of common code.
Factorize this code in new generic_{setup,shudown}_phy() functions.

Signed-off-by: Patrice Chotard 
Cc: Marek Vasut 
Cc: Simon Glass

Merge branch 'master' into next

2022-09-19T20:07:12+00:00

Signed-off-by: Tom Rini

phy: stm32-usbphyc: usbphyc is a clock provider of ck_usbo_48m clock

2022-09-06T11:54:50+00:00

ck_usbo_48m is generated by usbphyc PLL and used by OTG controller
for Full-Speed use cases with dedicated Full-Speed transceiver.

ck_usbo_48m is available as soon as the PLL is enabled.

Signed-off-by: Patrick Delaunay 
Reviewed-by: Patrice Chotard

phy: stm32-usbphyc: add counter of PLL consumer

2022-09-06T11:54:50+00:00

Add the counter of the PLL user n_pll_cons managed by the 2 functions
stm32_usbphyc_pll_enable / stm32_usbphyc_pll_disable.

This counter allow to remove the function stm32_usbphyc_is_init
and it is a preliminary step for ck_usbo_48m introduction.

Signed-off-by: Patrick Delaunay 
Reviewed-by: Patrice Chotard

phy: Add support for drivers to enable USB on QCS404 SoC

2022-08-26T14:55:45+00:00

QCS404 SoC supports two types of PHY, one supports high speed mode or
USB2 PHY and the other supports super speed mode or USB3 PHY. So add
corresponding PHY drivers.

Signed-off-by: Sumit Garg

phy: Move qcom SoCs specific phy drivers to qcom folder

2022-08-26T14:55:45+00:00

Signed-off-by: Sumit Garg

phy: ti: j721e-wiz: use OF data for device specific data

2022-07-25T13:38:47+00:00

Move device specific data into OF data structure so it
is easier to maintain and we can get rid of if statements.

Based on: https://lore.kernel.org/linux-phy/20220526064121.27625-1-rogerq@kernel.org/T/#u

Cc: Roger Quadros 
Signed-off-by: Matt Ranostay