u-boot.git/drivers/phy, branch v2024.10-rc2

drivers: phy: Remove duplicate newlines

2024-07-22T16:53:05Z

Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut

phy: rockchip: snps-pcie3: Fix clearing PHP_GRF_PCIESEL_CON bits

2024-07-17T06:48:18Z

The pcie1ln_sel bits for the RK3588 are getting set but not cleared due to an incorrect write mask. Use a newly introduced constant for the write mask to fix this. Also introduce a GENMASK-based constant for PCIE30_PHY_MODE. This fix is adapted from the upstream Linux commit by Sebastian Reichel: 55491a5fa163 ("phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits") Fixes: 50e54e80679b ("phy: rockchip: snps-pcie3: Add support for RK3588") Signed-off-by: Sebastian Kropatsch Reviewed-by: Kever Yang

phy: rockchip: snps-pcie3: Fix bifurcation for RK3588

2024-07-17T06:48:18Z

Misconfigured `PHP_GRF_PCIESEL` values are causing bifurcation issues, for example on the FriendlyElec CM3588 NAS board which uses bifurcation on both PCIe PCIe ports (all four lanes) to enable four M.2 NVMe sockets. Without this fix, NVMe devices do not get recognized. Correct the `PHP_GRF_PCIESEL` register configuration and simplify the bifurcation logic, enabling proper PCIe bifurcation based on the data-lanes property. This fix is adapted from the upstream Linux commit by Michal Tomek: f8020dfb311d ("phy: rockchip-snps-pcie3: fix bifurcation on rk3588") Fixes: 50e54e80679b ("phy: rockchip: snps-pcie3: Add support for RK3588") Signed-off-by: Sebastian Kropatsch Reviewed-by: Kever Yang

phy: rockchip: snps-pcie3: Fix "rockchip" spelling

2024-07-17T06:48:18Z

Several identifiers use "rochchip" instead of "rockchip". Fix this by replacing every instance of "rochchip" with "rockchip". Signed-off-by: Sebastian Kropatsch Reviewed-by: Kever Yang

phy: rockchip: naneng-combphy: Fix "rockchip" spelling

2024-07-17T06:48:18Z

Replace "rochchip" by "rockchip" in two instances. Signed-off-by: Sebastian Kropatsch Reviewed-by: Kever Yang

phy: rockchip: inno-hdmi: Fix missing readl base addr

2024-07-17T06:48:18Z

inno_poll passes the reg offset that is used by readl_poll_sleep_timeout without any base addr. Fix it. Bug: inno_hdmi_phy phy@ff430000: Pre-PLL locking failed inno_hdmi_phy phy@ff430000: PHY: Failed to power on phy@ff430000: -110. failed to power on phy (ret=-110) inno_hdmi_phy phy@ff430000: Pre-PLL locking failed inno_hdmi_phy phy@ff430000: PHY: Failed to power on phy@ff430000: -110. failed to power on phy (ret=-110) Fixes: aa2271184603 ("phy: rockchip: Add Rockchip INNO HDMI PHY driver") Suggested-by: Jonas Karlman Signed-off-by: Jagan Teki Reviewed-by: Kever Yang

Merge patch series "mediatek: cumulative trivial fix for OF_UPSTREAM support"

2024-07-08T17:56:59Z

Christian Marangi says: This is an initial series that have all the initial trivial fixes required for usage of OF_UPSTREAM for the mediatek SoC This also contains the pcie-gen3 driver and the required tphy support driver to make it work. Subsequent series will follow with conversion of the mtk-clk to permit usage of OF_UPSTREAM and upstream clk ID. MT7981, MT7986 and MT7988 migration to upstream clock ID is complete and working on MT7623. Series CI tested with PR: https://github.com/u-boot/u-boot/pull/590

phy: phy-mtk-tphy: add support for phy type switch

2024-07-08T17:45:50Z

Add support for PHY type switch via the mediatek topmisc syscon. This is needed on mt7981 to make the PCIe correctly work and display LinkUp. Follow the same implementation done on Linux kernel with the usage of the mediatek,syscon-type property. Example: u3port0: usb-phy@11e10700 { reg = <0x11e10700 0x900>; clocks = <&topckgen CK_TOP_USB3_PHY_SEL>; clock-names = "ref"; #phy-cells = <1>; mediatek,syscon-type = <&topmisc 0x218 0>; status = "okay"; }; Signed-off-by: Christian Marangi

phy: meson-gxl-usb2: remove phy_meson_gxl_usb2_set_mode

2024-06-25T13:25:10Z

Remove the public phy_meson_gxl_usb2_set_mode and move the implementation in the the set_mode callback. Reviewed-by: Marek Vasut Link: https://lore.kernel.org/r/20240620-u-boot-usb-gxl-phy-set-mode-v2-3-b81c027bc02c@linaro.org Signed-off-by: Neil Armstrong

phy: meson-gxl-usb2: add set_mode callback

2024-06-25T13:25:10Z

Implement set_mode callback by calling the current public function, use a temporary function name that will be removed when the public phy_meson_gxl_usb2_set_mode is finally removed in a following change. Reviewed-by: Marek Vasut Link: https://lore.kernel.org/r/20240620-u-boot-usb-gxl-phy-set-mode-v2-1-b81c027bc02c@linaro.org Signed-off-by: Neil Armstrong