<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/pinctrl/Kconfig, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>pinctrl: Correct dependencies for PINCTRL_TH1520</title>
<updated>2026-03-30T21:02:27+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-03-17T01:24:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1d5d6789e39ce6786a6ce60ceb8980458f2b4e6e'/>
<id>1d5d6789e39ce6786a6ce60ceb8980458f2b4e6e</id>
<content type='text'>
As exposed by "make randconfig", we have an issue with the dependencies
for PINCTRL_TH1520. It really needs to depend on PINCTRL_GENERIC rather
than select it, and PINCTRL_GENERIC in turn already depends on
PINCTRL_FULL.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As exposed by "make randconfig", we have an issue with the dependencies
for PINCTRL_TH1520. It really needs to depend on PINCTRL_GENERIC rather
than select it, and PINCTRL_GENERIC in turn already depends on
PINCTRL_FULL.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>scmi: pinctrl: add pinctrl driver for SCMI</title>
<updated>2026-03-23T02:58:20+00:00</updated>
<author>
<name>Dan Carpenter</name>
<email>dan.carpenter@linaro.org</email>
</author>
<published>2026-03-11T19:41:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0cb160f1b62905c701569850d3a4d1b46b3dc100'/>
<id>0cb160f1b62905c701569850d3a4d1b46b3dc100</id>
<content type='text'>
This driver adds the base support of pinctrl over SCMI.  The driver
does two main things.  First, it allows you to configure the initial
pin states.  Secondly, it's used a base to build a GPIO driver on
top of it.

To configure the states then add a pinmux config to the scmi_pinctrl
section:

        scmi_pinctrl: protocol@19 {
                reg = &lt;0x19&gt;;
                pinmux1: pinmux_test {
                        pinmux = &lt;0 1 0xFFFFFFFF 18 1
                                  0 2 0xFFFFFFFF 18 1
                                  0 3 0xFFFFFFFF 18 1&gt;;
                        function = "f_gpio1";
                        groups = "grp_1", "grp_3";
                };
        };

Under linux the pinctrl subsystem will parse the function and group
properties and use that to handle muxing.  However, under u-boot the
pin muxing is done using the "pinmux" property, which feeds raw SCMI
pinctrl PINCTRL_SETTINGS_CONFIGURE commands to the server.  The
numbers are: selector, identifier, function_id, config_type, and
config_value.  In the example above, it sets pins 1, 2, and 3 to 1.
The linux-kernel ignores this pinmux property.

Signed-off-by: Dan Carpenter &lt;dan.carpenter@linaro.org&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This driver adds the base support of pinctrl over SCMI.  The driver
does two main things.  First, it allows you to configure the initial
pin states.  Secondly, it's used a base to build a GPIO driver on
top of it.

To configure the states then add a pinmux config to the scmi_pinctrl
section:

        scmi_pinctrl: protocol@19 {
                reg = &lt;0x19&gt;;
                pinmux1: pinmux_test {
                        pinmux = &lt;0 1 0xFFFFFFFF 18 1
                                  0 2 0xFFFFFFFF 18 1
                                  0 3 0xFFFFFFFF 18 1&gt;;
                        function = "f_gpio1";
                        groups = "grp_1", "grp_3";
                };
        };

Under linux the pinctrl subsystem will parse the function and group
properties and use that to handle muxing.  However, under u-boot the
pin muxing is done using the "pinmux" property, which feeds raw SCMI
pinctrl PINCTRL_SETTINGS_CONFIGURE commands to the server.  The
numbers are: selector, identifier, function_id, config_type, and
config_value.  In the example above, it sets pins 1, 2, and 3 to 1.
The linux-kernel ignores this pinmux property.

Signed-off-by: Dan Carpenter &lt;dan.carpenter@linaro.org&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: zynqmp: Add SPL support</title>
<updated>2026-02-13T07:16:25+00:00</updated>
<author>
<name>Sean Anderson</name>
<email>sean.anderson@linux.dev</email>
</author>
<published>2026-01-29T18:40:11+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=df1875ea31df7762d3e4417438f5ff7563e15502'/>
<id>df1875ea31df7762d3e4417438f5ff7563e15502</id>
<content type='text'>
Although the pinctrl pm requests are implemented in the PMU firmware,
PM_QUERY_DATA is actually implemented in ATF. In SPL (or when running in
EL3), ATF is not yet running, so we need to implement this API
ourselves. Do the bare minimum, allowing SPL to enumerate functions, but
don't bother with groups. Groups take up a lot of space, and can be
emulated with pins. For example, a node like

	display-port {
		mux {
			groups = "dpaux0_1";
			function = "dpaux0";
		};
	};

can be replaced by

	display-port {
		mux {
			pins = "MIO34", "MIO35", "MIO36", "MIO37";
			function = "dpaux0";
		};
	};

While this isn't backwards-compatible with existing devicetrees, it's
more than enough for SPL where we may only need to mux one or two pins.

Add SPL_PINCTRL_ZYNQMP to ensure there's no SPL size growth when pinctrl
is enabled in U-Boot but isn't necessary for SPL. The only config this
would affect is Kria, but SPL_PINCTRL_GENERIC is disabled so
SPL_PINCTRL_ZYNQMP is not selected.

Signed-off-by: Sean Anderson &lt;sean.anderson@linux.dev&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/20260129184011.3932790-1-sean.anderson@linux.dev
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Although the pinctrl pm requests are implemented in the PMU firmware,
PM_QUERY_DATA is actually implemented in ATF. In SPL (or when running in
EL3), ATF is not yet running, so we need to implement this API
ourselves. Do the bare minimum, allowing SPL to enumerate functions, but
don't bother with groups. Groups take up a lot of space, and can be
emulated with pins. For example, a node like

	display-port {
		mux {
			groups = "dpaux0_1";
			function = "dpaux0";
		};
	};

can be replaced by

	display-port {
		mux {
			pins = "MIO34", "MIO35", "MIO36", "MIO37";
			function = "dpaux0";
		};
	};

While this isn't backwards-compatible with existing devicetrees, it's
more than enough for SPL where we may only need to mux one or two pins.

Add SPL_PINCTRL_ZYNQMP to ensure there's no SPL size growth when pinctrl
is enabled in U-Boot but isn't necessary for SPL. The only config this
would affect is Kria, but SPL_PINCTRL_GENERIC is disabled so
SPL_PINCTRL_ZYNQMP is not selected.

Signed-off-by: Sean Anderson &lt;sean.anderson@linux.dev&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/20260129184011.3932790-1-sean.anderson@linux.dev
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: core: Default to using DEVRES outside of xPL</title>
<updated>2026-01-09T15:08:14+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-12-27T22:37:11+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=217cf656e249f698d390a7d8eaf255eb1a6c0230'/>
<id>217cf656e249f698d390a7d8eaf255eb1a6c0230</id>
<content type='text'>
The devm alloc functions that we have may follow the Linux kernel model
where allocations are (almost always) automatically free()'d. However,
quite often we don't enable, in full U-Boot, the tracking and free()'ing
functionality. This in turn leads to memory leaks because the driver
author expects that since the functions have the same name as in the
Linux Kernel they have the same behavior. In turn we then get
functionally correct commits such as commit 00e1fed93c8c ("firmware:
ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually
add these calls. Rather than manually tracking allocations and
implementing free()s, rework things so that we follow expectations by
enabling the DEVRES functionality (outside of xPL phases).

This turns DEVRES from a prompted symbol to a symbol that must be
select'd, and we now remove our non-managed alloc/free functions from
outside of xPL builds.

Reviewed-by: Michael Trimarchi &lt;michael@amarulasolutions.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The devm alloc functions that we have may follow the Linux kernel model
where allocations are (almost always) automatically free()'d. However,
quite often we don't enable, in full U-Boot, the tracking and free()'ing
functionality. This in turn leads to memory leaks because the driver
author expects that since the functions have the same name as in the
Linux Kernel they have the same behavior. In turn we then get
functionally correct commits such as commit 00e1fed93c8c ("firmware:
ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually
add these calls. Rather than manually tracking allocations and
implementing free()s, rework things so that we follow expectations by
enabling the DEVRES functionality (outside of xPL phases).

This turns DEVRES from a prompted symbol to a symbol that must be
select'd, and we now remove our non-managed alloc/free functions from
outside of xPL builds.

Reviewed-by: Michael Trimarchi &lt;michael@amarulasolutions.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: Tighten some pinctrl driver dependencies</title>
<updated>2025-08-14T16:58:48+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-08-04T21:52:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e7a95ee2b575d7f0f44da3b3aeb951508eac1511'/>
<id>e7a95ee2b575d7f0f44da3b3aeb951508eac1511</id>
<content type='text'>
A few pinctrl drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
A few pinctrl drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: Port pin controller driver for T-Head TH1520 SoC</title>
<updated>2025-07-03T10:10:58+00:00</updated>
<author>
<name>Yao Zi</name>
<email>ziyao@disroot.org</email>
</author>
<published>2025-06-18T09:54:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4981db81303b68de3ff1e2278e1d95a6534039d3'/>
<id>4981db81303b68de3ff1e2278e1d95a6534039d3</id>
<content type='text'>
The SoC pads of TH1520 are separated into three groups (AP 1, AP 2 and
AON) controlled by independent pin controllers. This patch ports their
driver from Linux kernel with most code for setting pinconf and pinmux
kept as is.

The dt-binding of TH1520 pin controller uses a schema where pins to
configure are specfied as strings and looked up at runtime, which the
generic pinctrl helpers of U-Boot cannot parse, thus a customized
set_state() callback is implemented to parse pinconfig nodes and setup
the configuration.

Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
Acked-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SoC pads of TH1520 are separated into three groups (AP 1, AP 2 and
AON) controlled by independent pin controllers. This patch ports their
driver from Linux kernel with most code for setting pinconf and pinmux
kept as is.

The dt-binding of TH1520 pin controller uses a schema where pins to
configure are specfied as strings and looked up at runtime, which the
generic pinctrl helpers of U-Boot cannot parse, thus a customized
set_state() callback is implemented to parse pinconfig nodes and setup
the configuration.

Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
Acked-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: gpio: sx150x: add Semtech SX150x I2C GPIO expander and pinctrl driver</title>
<updated>2025-06-03T23:18:03+00:00</updated>
<author>
<name>Anis Chali</name>
<email>chalianis1@gmail.com</email>
</author>
<published>2025-05-18T21:25:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5451504256d34dca5b810a512d3c8dec84ebb49c'/>
<id>5451504256d34dca5b810a512d3c8dec84ebb49c</id>
<content type='text'>
 implement a driver to use semtech pinctrl and
 gpio expander, this driver is adapted from a
 existent linux driver that is written by
 Gregory Bean &lt;gbean@codeaurora.org&gt;.

Signed-off-by: Anis Chali &lt;chalianis1@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
 implement a driver to use semtech pinctrl and
 gpio expander, this driver is adapted from a
 existent linux driver that is written by
 Gregory Bean &lt;gbean@codeaurora.org&gt;.

Signed-off-by: Anis Chali &lt;chalianis1@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: Add support for ADI SC5XX-family pinctrl</title>
<updated>2025-03-12T16:24:58+00:00</updated>
<author>
<name>Greg Malysa</name>
<email>malysagreg@gmail.com</email>
</author>
<published>2025-02-26T17:30:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=79ccd6c7dc7055d5bbe375fddef925d7986c204d'/>
<id>79ccd6c7dc7055d5bbe375fddef925d7986c204d</id>
<content type='text'>
This adds support for pin configuration on the Analog Devices SC5XX SoC
family. This commit is largely a port of the Linux driver, which has not
yet been submitted upstream.

Co-developed-by: Nathan Barrett-Morrison &lt;nathan.morrison@timesys.com&gt;
Signed-off-by: Nathan Barrett-Morrison &lt;nathan.morrison@timesys.com&gt;
Co-developed-by: Ian Roberts &lt;ian.roberts@timesys.com&gt;
Signed-off-by: Ian Roberts &lt;ian.roberts@timesys.com&gt;
Signed-off-by: Vasileios Bimpikas &lt;vasileios.bimpikas@analog.com&gt;
Signed-off-by: Utsav Agarwal &lt;utsav.agarwal@analog.com&gt;
Signed-off-by: Arturs Artamonovs &lt;arturs.artamonovs@analog.com&gt;
Signed-off-by: Oliver Gaskell &lt;Oliver.Gaskell@analog.com&gt;
Signed-off-by: Greg Malysa &lt;malysagreg@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds support for pin configuration on the Analog Devices SC5XX SoC
family. This commit is largely a port of the Linux driver, which has not
yet been submitted upstream.

Co-developed-by: Nathan Barrett-Morrison &lt;nathan.morrison@timesys.com&gt;
Signed-off-by: Nathan Barrett-Morrison &lt;nathan.morrison@timesys.com&gt;
Co-developed-by: Ian Roberts &lt;ian.roberts@timesys.com&gt;
Signed-off-by: Ian Roberts &lt;ian.roberts@timesys.com&gt;
Signed-off-by: Vasileios Bimpikas &lt;vasileios.bimpikas@analog.com&gt;
Signed-off-by: Utsav Agarwal &lt;utsav.agarwal@analog.com&gt;
Signed-off-by: Arturs Artamonovs &lt;arturs.artamonovs@analog.com&gt;
Signed-off-by: Oliver Gaskell &lt;Oliver.Gaskell@analog.com&gt;
Signed-off-by: Greg Malysa &lt;malysagreg@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: rockchip: allow to build for TPL</title>
<updated>2024-11-11T07:14:14+00:00</updated>
<author>
<name>Quentin Schulz</name>
<email>quentin.schulz@cherry.de</email>
</author>
<published>2024-11-06T11:29:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5bc65f5cab2369e0053d19df356b4bcb31150409'/>
<id>5bc65f5cab2369e0053d19df356b4bcb31150409</id>
<content type='text'>
A later commit will make use of the pinctrl driver in TPL so let's add
the ability to build the Rockchip pinctrl driver in TPL.

Reviewed-by: Paul Kocialkowski &lt;paulk@sys-base.io&gt;
Signed-off-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
A later commit will make use of the pinctrl driver in TPL so let's add
the ability to build the Rockchip pinctrl driver in TPL.

Reviewed-by: Paul Kocialkowski &lt;paulk@sys-base.io&gt;
Signed-off-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: move out of mach-snapdragon</title>
<updated>2024-01-16T12:26:24+00:00</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2023-11-14T12:55:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=53b2c7af69464d06cc12fe96e8db6cabf201ba38'/>
<id>53b2c7af69464d06cc12fe96e8db6cabf201ba38</id>
<content type='text'>
Move the Qualcomm pinctrl drivers out of mach-snapdragon and over to the
rest of the pinctrl drivers, adjust the drivers so that support for each
platform can be enabled/disabled individually and introduce platform
specific configuration options.

Reviewed-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move the Qualcomm pinctrl drivers out of mach-snapdragon and over to the
rest of the pinctrl drivers, adjust the drivers so that support for each
platform can be enabled/disabled individually and introduce platform
specific configuration options.

Reviewed-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
