<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/pinctrl/Kconfig, branch v2017.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl/Kconfig?h=v2017.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl/Kconfig?h=v2017.01'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2016-12-12T08:04:52Z</updated>
<entry>
<title>arm64: mvebu: pinctrl: Add pin control driver for A8K family</title>
<updated>2016-12-12T08:04:52Z</updated>
<author>
<name>Konstantin Porotchkin</name>
<email>kostap@marvell.com</email>
</author>
<published>2016-12-08T10:22:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=656e6cc86b96be88f99f6f3ef1df3ef3122a8766'/>
<id>urn:sha1:656e6cc86b96be88f99f6f3ef1df3ef3122a8766</id>
<content type='text'>
Add a DM port of Marvell pin control driver.
The A8K SoC family contains several silicone dies interconnected
in a single package. Every die is normally equipped with its own
pin controller unit.
There are 2 pin controllers in A70x0 SoC and 3 in A80x0 SoC.

Signed-off-by: Konstantin Porotchkin &lt;kostap@marvell.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Nadav Haklai &lt;nadavh@marvell.com&gt;
Cc: Neta Zur Hershkovits &lt;neta@marvell.com&gt;
Cc: Omri Itach &lt;omrii@marvell.com&gt;
Cc: Igal Liberman &lt;igall@marvell.com&gt;
Cc: Haim Boot &lt;hayim@marvell.com&gt;
Cc: Hanna Hawa &lt;hannah@marvell.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>pinctrl: add driver for rk3399</title>
<updated>2016-09-22T13:32:22Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2016-08-16T09:58:11Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a2c08df3813b6b1ab6fd016a9f5b264c634e6813'/>
<id>urn:sha1:a2c08df3813b6b1ab6fd016a9f5b264c634e6813</id>
<content type='text'>
This patch add pinctrl driver for rk3399.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: add driver for meson-gxbb pin controller</title>
<updated>2016-09-06T17:18:19Z</updated>
<author>
<name>Beniamino Galvani</name>
<email>b.galvani@gmail.com</email>
</author>
<published>2016-08-16T09:49:49Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=677b53580d5d86ca65737497829d581544ae71bf'/>
<id>urn:sha1:677b53580d5d86ca65737497829d581544ae71bf</id>
<content type='text'>
Add a pin controller driver for Meson GXBB adapted from Linux kernel.

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: at91-pio4: Add pinctrl driver</title>
<updated>2016-08-15T20:58:03Z</updated>
<author>
<name>Wenyou Yang</name>
<email>wenyou.yang@atmel.com</email>
</author>
<published>2016-07-20T09:16:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ac72e174f95ebce2e4a4e2165828223427b2a5f3'/>
<id>urn:sha1:ac72e174f95ebce2e4a4e2165828223427b2a5f3</id>
<content type='text'>
AT91 PIO4 controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.

The pin configuration is performed on specific registers which
are shared along with the gpio controller. So regard the pinctrl
device as a child of atmel_pio4 device.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas@biessmann.org&gt;
</content>
</entry>
<entry>
<title>cosmetic: rockchip: sort socs according to numbers</title>
<updated>2016-07-26T02:44:20Z</updated>
<author>
<name>Heiko Stübner</name>
<email>heiko@sntech.de</email>
</author>
<published>2016-07-15T22:17:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=041cdb5f3d0fe778546bcf5b8b69e6b774db1d9e'/>
<id>urn:sha1:041cdb5f3d0fe778546bcf5b8b69e6b774db1d9e</id>
<content type='text'>
Having some sort of ordering proofed helpful in a lot of other places
already. So for a larger number of rockchip socs it might be helpful
as well instead of an ever increasing unsorted list.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Andreas Färber &lt;afaerber@suse.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>cosmetic: rockchip: rk3036: pinctrl: fix config symbol naming</title>
<updated>2016-07-26T02:44:20Z</updated>
<author>
<name>Heiko Stübner</name>
<email>heiko@sntech.de</email>
</author>
<published>2016-07-15T22:17:14Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=23c3042b106f6f5f92f4b5ec11b3d07eaf35bc06'/>
<id>urn:sha1:23c3042b106f6f5f92f4b5ec11b3d07eaf35bc06</id>
<content type='text'>
Rockchip socs are always named rkxxxx in all places, as also shown
by the naming of the rk3036 pinctrl file itself.
Therefore also name the config symbol according to this scheme.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>cosmetic: rockchip: rk3288: pinctrl: fix config symbol naming</title>
<updated>2016-07-26T02:44:20Z</updated>
<author>
<name>Heiko Stübner</name>
<email>heiko@sntech.de</email>
</author>
<published>2016-07-15T22:17:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9f862ec717dd1087c8ccc282d231a3b3bcd608e2'/>
<id>urn:sha1:9f862ec717dd1087c8ccc282d231a3b3bcd608e2</id>
<content type='text'>
The rk3288 pinctrl is very specific to this soc, so should
not hog the generic rockchip naming.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: Add pinctrl driver support for Exynos7420 SoC</title>
<updated>2016-05-25T01:00:18Z</updated>
<author>
<name>Thomas Abraham</name>
<email>thomas.ab@samsung.com</email>
</author>
<published>2016-04-23T16:48:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=16ca80adc551808b6be1d43f30997f8b4fdfbd39'/>
<id>urn:sha1:16ca80adc551808b6be1d43f30997f8b4fdfbd39</id>
<content type='text'>
Add pinctrl driver support for Samsung's Exynos7420 SoC. The changes
have been split into Exynos7420 specific and common Exynos specific
portions so that this implementation is reusable on other Exynos
SoCs as well.

The Exynos pinctrl driver supports only device tree based pin
configuration. The bindings used are similar to the ones used in the
linux kernel.

Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Signed-off-by: Thomas Abraham &lt;thomas.ab@samsung.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
</entry>
<entry>
<title>drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros qca953x.</title>
<updated>2016-05-20T23:25:50Z</updated>
<author>
<name>Wills Wang</name>
<email>wills.wang@live.com</email>
</author>
<published>2016-03-16T08:59:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c102453aebe92530962de41539ce4f198d27b9c7'/>
<id>urn:sha1:c102453aebe92530962de41539ce4f198d27b9c7</id>
<content type='text'>
This is a simple pinctrl driver, it just support uart and spi pin-mux now.

Signed-off-by: Wills Wang &lt;wills.wang@live.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
[fixed typo in commit subject line]
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros ar933x.</title>
<updated>2016-05-20T23:25:50Z</updated>
<author>
<name>Wills Wang</name>
<email>wills.wang@live.com</email>
</author>
<published>2016-03-16T08:59:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a79d0643f4cac19711cb8d1c2088fc907d47500f'/>
<id>urn:sha1:a79d0643f4cac19711cb8d1c2088fc907d47500f</id>
<content type='text'>
This is a simple pinctrl driver, it just support uart and spi pin-mux now.

Signed-off-by: Wills Wang &lt;wills.wang@live.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
[fixed typo in commit subject line]
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
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