<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/pinctrl/Kconfig, branch v2018.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl/Kconfig?h=v2018.09</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl/Kconfig?h=v2018.09'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2018-03-05T15:06:05Z</updated>
<entry>
<title>pinctrl: Kconfig: Fix typo</title>
<updated>2018-03-05T15:06:05Z</updated>
<author>
<name>Marek Behún</name>
<email>marek.behun@nic.cz</email>
</author>
<published>2018-03-02T08:56:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=de2069c761b0e9334b4e68e02f63bf08d8ea1e45'/>
<id>urn:sha1:de2069c761b0e9334b4e68e02f63bf08d8ea1e45</id>
<content type='text'>
Signed-off-by: Marek Behun &lt;marek.behun@nic.cz&gt;
</content>
</entry>
<entry>
<title>bcm283x: Add pinctrl driver</title>
<updated>2018-01-28T17:27:32Z</updated>
<author>
<name>Alexander Graf</name>
<email>agraf@suse.de</email>
</author>
<published>2018-01-23T17:05:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=caf2233b281c03e3e359061a3dfa537d8a25c273'/>
<id>urn:sha1:caf2233b281c03e3e359061a3dfa537d8a25c273</id>
<content type='text'>
The bcm283x family of SoCs have a GPIO controller that also acts as
pinctrl controller.

This patch introduces a new pinctrl driver that can actually properly mux
devices into their device tree defined pin states and is now the primary
owner of the gpio device. The previous GPIO driver gets moved into a
subdevice of the pinctrl driver, bound to the same OF node.

That way whenever a device asks for pinctrl support, it gets it
automatically from the pinctrl driver and GPIO support is still available
in the normal command line phase.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3128: add pinctrl driver</title>
<updated>2017-11-30T21:55:26Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-11-28T08:04:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e129c480e496c2a5e816c7f7e0b27afb3ed037d1'/>
<id>urn:sha1:e129c480e496c2a5e816c7f7e0b27afb3ed037d1</id>
<content type='text'>
Add rk3128 pinctrl driver and grf/iomux structure definition.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: rmobile: Add Renesas RCar pincontrol driver</title>
<updated>2017-09-27T21:54:06Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut@gmail.com</email>
</author>
<published>2017-09-15T19:13:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=910df4d07e370dc0dabafaaf85417508cccf43f3'/>
<id>urn:sha1:910df4d07e370dc0dabafaaf85417508cccf43f3</id>
<content type='text'>
Add PFC pincontrol driver for the Renesas RCar Gen3 R8A7795 and R8A7796
SoCs. This driver uses the PFC pin tables from Linux, thus letting us
share the occassional fixes to those tables. This driver also has a DT
support, so the pinmux is configured from DT instead of the ad-hoc setup
in board file.

This driver is meant to replace the pinmux part of SH_GPIO_PFC driver.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
Signed-off-by: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</content>
</entry>
<entry>
<title>dm: Kconfig: fix typo in help for SPL_PINCTRL</title>
<updated>2017-07-31T15:22:53Z</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-07-26T10:27:42Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0fa0abecfc1051b624aff3008a728abe41127b67'/>
<id>urn:sha1:0fa0abecfc1051b624aff3008a728abe41127b67</id>
<content type='text'>
Changes 'controlloers' to 'controllers' in the help-text for
SPL_PINCTRL.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk322x: add pinctrl driver</title>
<updated>2017-07-11T10:13:46Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-06-23T09:17:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5cc9d31a79fecfaacfdbc9c566b6df35765100f8'/>
<id>urn:sha1:5cc9d31a79fecfaacfdbc9c566b6df35765100f8</id>
<content type='text'>
Add init pinctrl driver support for:
- i2c;
- spi;
- uart;
- pwm;
- emmc/sdmmc;

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>stm32: stm32f7: add spl build support</title>
<updated>2017-06-09T15:23:55Z</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2017-05-28T19:55:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b97476965bf292c13074e01de4bd39253de0ef66'/>
<id>urn:sha1:b97476965bf292c13074e01de4bd39253de0ef66</id>
<content type='text'>
This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram &amp; then jumps to entry point.

Here are the flash memory addresses for U-Boot-spl &amp; standard U-Boot:
	- spl U-Boot		: 0x0800_0000
	- standard U-Boot	: 0x0800_8000

To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
[trini: Rework Kconfig logic a bit]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>rockchip: pinctrl: Add rv1108 pinctrl driver</title>
<updated>2017-06-07T13:29:24Z</updated>
<author>
<name>Andy Yan</name>
<email>andy.yan@rock-chips.com</email>
</author>
<published>2017-06-01T10:00:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=09aa7c468cd3f93c2eb9286bbdb163c914d3c2ae'/>
<id>urn:sha1:09aa7c468cd3f93c2eb9286bbdb163c914d3c2ae</id>
<content type='text'>
Add pinctrl support for Rockchip rv1108 soc

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3368: Add pinctrl driver</title>
<updated>2017-06-07T13:29:19Z</updated>
<author>
<name>Andy Yan</name>
<email>andy.yan@rock-chips.com</email>
</author>
<published>2017-05-15T09:50:35Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=27600a583725ed0fa9cd4755a86ed0051bfb8c67'/>
<id>urn:sha1:27600a583725ed0fa9cd4755a86ed0051bfb8c67</id>
<content type='text'>
Add driver to support iomux setup for the most commonly
used peripherals on rk3368.

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>aspeed: AST2500 Pinctrl Driver</title>
<updated>2017-05-08T15:57:33Z</updated>
<author>
<name>maxims@google.com</name>
<email>maxims@google.com</email>
</author>
<published>2017-04-17T19:00:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4f0e44e46615e3c827dcd1ec59677be1058d394c'/>
<id>urn:sha1:4f0e44e46615e3c827dcd1ec59677be1058d394c</id>
<content type='text'>
This driver uses Generic Pinctrl framework and is compatible with
the Linux driver for ast2500: it uses the same device tree
configuration.

Not all pins are supported by the driver at the moment, so it actually
compatible with ast2400. In general, however, there are differences that
in the future would be easier to maintain separately.

Signed-off-by: Maxim Sloyko &lt;maxims@google.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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