u-boot.git/drivers/pinctrl/Makefile, branch master

scmi: pinctrl: add pinctrl driver for SCMI

2026-03-23T02:58:20+00:00

This driver adds the base support of pinctrl over SCMI.  The driver
does two main things.  First, it allows you to configure the initial
pin states.  Secondly, it's used a base to build a GPIO driver on
top of it.

To configure the states then add a pinmux config to the scmi_pinctrl
section:

        scmi_pinctrl: protocol@19 {
                reg = <0x19>;
                pinmux1: pinmux_test {
                        pinmux = <0 1 0xFFFFFFFF 18 1
                                  0 2 0xFFFFFFFF 18 1
                                  0 3 0xFFFFFFFF 18 1>;
                        function = "f_gpio1";
                        groups = "grp_1", "grp_3";
                };
        };

Under linux the pinctrl subsystem will parse the function and group
properties and use that to handle muxing.  However, under u-boot the
pin muxing is done using the "pinmux" property, which feeds raw SCMI
pinctrl PINCTRL_SETTINGS_CONFIGURE commands to the server.  The
numbers are: selector, identifier, function_id, config_type, and
config_value.  In the example above, it sets pins 1, 2, and 3 to 1.
The linux-kernel ignores this pinmux property.

Signed-off-by: Dan Carpenter 
Reviewed-by: Peng Fan 
Signed-off-by: Peng Fan

pinctrl: zynqmp: Add SPL support

2026-02-13T07:16:25+00:00

Although the pinctrl pm requests are implemented in the PMU firmware,
PM_QUERY_DATA is actually implemented in ATF. In SPL (or when running in
EL3), ATF is not yet running, so we need to implement this API
ourselves. Do the bare minimum, allowing SPL to enumerate functions, but
don't bother with groups. Groups take up a lot of space, and can be
emulated with pins. For example, a node like

	display-port {
		mux {
			groups = "dpaux0_1";
			function = "dpaux0";
		};
	};

can be replaced by

	display-port {
		mux {
			pins = "MIO34", "MIO35", "MIO36", "MIO37";
			function = "dpaux0";
		};
	};

While this isn't backwards-compatible with existing devicetrees, it's
more than enough for SPL where we may only need to mux one or two pins.

Add SPL_PINCTRL_ZYNQMP to ensure there's no SPL size growth when pinctrl
is enabled in U-Boot but isn't necessary for SPL. The only config this
would affect is Kria, but SPL_PINCTRL_GENERIC is disabled so
SPL_PINCTRL_ZYNQMP is not selected.

Signed-off-by: Sean Anderson 
Signed-off-by: Michal Simek 
Link: https://lore.kernel.org/r/20260129184011.3932790-1-sean.anderson@linux.dev

pinctrl: Port pin controller driver for T-Head TH1520 SoC

2025-07-03T10:10:58+00:00

The SoC pads of TH1520 are separated into three groups (AP 1, AP 2 and
AON) controlled by independent pin controllers. This patch ports their
driver from Linux kernel with most code for setting pinconf and pinmux
kept as is.

The dt-binding of TH1520 pin controller uses a schema where pins to
configure are specfied as strings and looked up at runtime, which the
generic pinctrl helpers of U-Boot cannot parse, thus a customized
set_state() callback is implemented to parse pinconfig nodes and setup
the configuration.

Signed-off-by: Yao Zi 
Acked-by: Leo Yu-Chi Liang

pinctrl: gpio: sx150x: add Semtech SX150x I2C GPIO expander and pinctrl driver

2025-06-03T23:18:03+00:00

 implement a driver to use semtech pinctrl and
 gpio expander, this driver is adapted from a
 existent linux driver that is written by
 Gregory Bean .

Signed-off-by: Anis Chali

Kbuild: Always use $(PHASE_)

2025-04-11T18:16:44+00:00

It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.

Signed-off-by: Tom Rini

Merge patch series "drivers: Driver support for ADI SC5xx SoCs"

2025-03-12T16:25:13+00:00

Greg Malysa  says:

This series adds all of the supported peripheral drivers for the sc5xx
series of SoCs from Analog Devices and other drivers that are used by
the evaluation kits, such as a GPIO expander used by the EZLITE carrier
boards. This series passes gitlab CI tests.

Link: https://lore.kernel.org/r/20250226173150.13198-1-malysagreg@gmail.com

pinctrl: Add support for ADI SC5XX-family pinctrl

2025-03-12T16:24:58+00:00

This adds support for pin configuration on the Analog Devices SC5XX SoC
family. This commit is largely a port of the Linux driver, which has not
yet been submitted upstream.

Co-developed-by: Nathan Barrett-Morrison 
Signed-off-by: Nathan Barrett-Morrison 
Co-developed-by: Ian Roberts 
Signed-off-by: Ian Roberts 
Signed-off-by: Vasileios Bimpikas 
Signed-off-by: Utsav Agarwal 
Signed-off-by: Arturs Artamonovs 
Signed-off-by: Oliver Gaskell 
Signed-off-by: Greg Malysa

pinctrl: renesas: Drop special RZN1 entry from Makefile

2025-03-11T22:05:57+00:00

The RZN1 symbol name is CONFIG_RZN1, there is no CONFIG_ARCH_RZN1.
Since RZN1 enables CONFIG_ARCH_RENESAS as well, remove the special
RZN1 entry from Makefile, the RZN1 pinctrl driver will still be
pulled in via CONFIG_ARCH_RENESAS.

Fixes: e4aea57fa773 ("pinctrl: renesas: add R906G032 driver")
Signed-off-by: Marek Vasut 
Reviewed-by: Paul Barker

global: Rename SPL_ to XPL_

2024-10-11T17:44:48+00:00

Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.

Signed-off-by: Simon Glass

ARM: renesas: Rename ARCH_RMOBILE to ARCH_RENESAS

2024-03-02T19:29:36+00:00

Rename ARCH_RMOBILE to ARCH_RENESAS because all the chips are made
by Renesas, while only a subset of them is from the R-Mobile
line.

Use the following command to perform the rename:

"
$ git grep -l 'ARCH_RMOBILE' | xargs -I {} sed -i 's@ARCH_RMOBILE@ARCH_RENESAS@g' {}
"

Signed-off-by: Marek Vasut 
Reviewed-by: Paul Barker