<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/pinctrl/Makefile, branch u-boot-2016.09.y</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>pinctrl: add driver for meson-gxbb pin controller</title>
<updated>2016-09-06T17:18:19+00:00</updated>
<author>
<name>Beniamino Galvani</name>
<email>b.galvani@gmail.com</email>
</author>
<published>2016-08-16T09:49:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=677b53580d5d86ca65737497829d581544ae71bf'/>
<id>677b53580d5d86ca65737497829d581544ae71bf</id>
<content type='text'>
Add a pin controller driver for Meson GXBB adapted from Linux kernel.

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a pin controller driver for Meson GXBB adapted from Linux kernel.

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: at91-pio4: Add pinctrl driver</title>
<updated>2016-08-15T20:58:03+00:00</updated>
<author>
<name>Wenyou Yang</name>
<email>wenyou.yang@atmel.com</email>
</author>
<published>2016-07-20T09:16:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ac72e174f95ebce2e4a4e2165828223427b2a5f3'/>
<id>ac72e174f95ebce2e4a4e2165828223427b2a5f3</id>
<content type='text'>
AT91 PIO4 controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.

The pin configuration is performed on specific registers which
are shared along with the gpio controller. So regard the pinctrl
device as a child of atmel_pio4 device.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas@biessmann.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
AT91 PIO4 controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.

The pin configuration is performed on specific registers which
are shared along with the gpio controller. So regard the pinctrl
device as a child of atmel_pio4 device.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Andreas Bießmann &lt;andreas@biessmann.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: Add pinctrl driver support for Exynos7420 SoC</title>
<updated>2016-05-25T01:00:18+00:00</updated>
<author>
<name>Thomas Abraham</name>
<email>thomas.ab@samsung.com</email>
</author>
<published>2016-04-23T16:48:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=16ca80adc551808b6be1d43f30997f8b4fdfbd39'/>
<id>16ca80adc551808b6be1d43f30997f8b4fdfbd39</id>
<content type='text'>
Add pinctrl driver support for Samsung's Exynos7420 SoC. The changes
have been split into Exynos7420 specific and common Exynos specific
portions so that this implementation is reusable on other Exynos
SoCs as well.

The Exynos pinctrl driver supports only device tree based pin
configuration. The bindings used are similar to the ones used in the
linux kernel.

Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Signed-off-by: Thomas Abraham &lt;thomas.ab@samsung.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add pinctrl driver support for Samsung's Exynos7420 SoC. The changes
have been split into Exynos7420 specific and common Exynos specific
portions so that this implementation is reusable on other Exynos
SoCs as well.

The Exynos pinctrl driver supports only device tree based pin
configuration. The bindings used are similar to the ones used in the
linux kernel.

Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Signed-off-by: Thomas Abraham &lt;thomas.ab@samsung.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros ar933x.</title>
<updated>2016-05-20T23:25:50+00:00</updated>
<author>
<name>Wills Wang</name>
<email>wills.wang@live.com</email>
</author>
<published>2016-03-16T08:59:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a79d0643f4cac19711cb8d1c2088fc907d47500f'/>
<id>a79d0643f4cac19711cb8d1c2088fc907d47500f</id>
<content type='text'>
This is a simple pinctrl driver, it just support uart and spi pin-mux now.

Signed-off-by: Wills Wang &lt;wills.wang@live.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
[fixed typo in commit subject line]
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is a simple pinctrl driver, it just support uart and spi pin-mux now.

Signed-off-by: Wills Wang &lt;wills.wang@live.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
[fixed typo in commit subject line]
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: uniphier: guard uniphier directory with CONFIG_PINCTRL_UNIPHIER</title>
<updated>2016-03-08T16:11:04+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-03-04T06:56:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1d22c4b1bdb169850736849ac100d7822512b6fb'/>
<id>1d22c4b1bdb169850736849ac100d7822512b6fb</id>
<content type='text'>
CONFIG_PINCTRL_UNIPHIER is more suitable than CONFIG_ARCH_UNIPHIER
to guard the drivers/pinctrl/uniphier directory.

The current CONFIG_PINCTRL_UNIPHIER_CORE is a bit long, so rename it
into CONFIG_PINCTRL_UNIPHIER.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
CONFIG_PINCTRL_UNIPHIER is more suitable than CONFIG_ARCH_UNIPHIER
to guard the drivers/pinctrl/uniphier directory.

The current CONFIG_PINCTRL_UNIPHIER_CORE is a bit long, so rename it
into CONFIG_PINCTRL_UNIPHIER.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: imx: Introduce pinctrl driver for i.MX6</title>
<updated>2016-02-21T10:23:48+00:00</updated>
<author>
<name>Peng Fan</name>
<email>van.freenix@gmail.com</email>
</author>
<published>2016-02-03T02:06:07+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=745df68d362346306900678178b8a7d5bbd73d0e'/>
<id>745df68d362346306900678178b8a7d5bbd73d0e</id>
<content type='text'>
Introduce pinctrl for i.MX6
1. pinctrl-imx.c is for common usage. It's used by i.MX6/7.
2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry.
3. To the pinctrl_ops implementation, only set_state is implemented.
   To i.MX6/7, the pinctrl dts entry is as following:
&amp;iomuxc {
        pinctrl-names = "default";

        pinctrl_csi1: csi1grp {
                fsl,pins = &lt;
                MX6UL_PAD_CSI_MCLK__CSI_MCLK            0x1b088
                MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK        0x1b088
                MX6UL_PAD_CSI_VSYNC__CSI_VSYNC          0x1b088
                &gt;;
        };

        [.....]
};
  there is no property named function or groups. So pinctrl_generic_set_state
  can not be used here.
5. This driver is a simple implementation for i.mx iomux controller,
   only parse the fsl,pins property and write value to registers.
6. With DEBUG enabled, we can see log when "i2c bus 0":
   "
   set_state_simple op missing
   imx_pinctrl_set_state: i2c1grp
   mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f
   write mux: offset 0x14c val 0x10
   select_input: offset 0x5d8 val 0x1
   write config: offset 0x3bc val 0x7f
   mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f
   write mux: offset 0x148 val 0x10
   select_input: offset 0x5d4 val 0x1
   write config: offset 0x3b8 val 0x7f
   "
   this means imx6 pinctrl driver works as expected.

Signed-off-by: Peng Fan &lt;van.freenix@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Introduce pinctrl for i.MX6
1. pinctrl-imx.c is for common usage. It's used by i.MX6/7.
2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry.
3. To the pinctrl_ops implementation, only set_state is implemented.
   To i.MX6/7, the pinctrl dts entry is as following:
&amp;iomuxc {
        pinctrl-names = "default";

        pinctrl_csi1: csi1grp {
                fsl,pins = &lt;
                MX6UL_PAD_CSI_MCLK__CSI_MCLK            0x1b088
                MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK        0x1b088
                MX6UL_PAD_CSI_VSYNC__CSI_VSYNC          0x1b088
                &gt;;
        };

        [.....]
};
  there is no property named function or groups. So pinctrl_generic_set_state
  can not be used here.
5. This driver is a simple implementation for i.mx iomux controller,
   only parse the fsl,pins property and write value to registers.
6. With DEBUG enabled, we can see log when "i2c bus 0":
   "
   set_state_simple op missing
   imx_pinctrl_set_state: i2c1grp
   mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f
   write mux: offset 0x14c val 0x10
   select_input: offset 0x5d8 val 0x1
   write config: offset 0x3bc val 0x7f
   mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f
   write mux: offset 0x148 val 0x10
   select_input: offset 0x5d4 val 0x1
   write config: offset 0x3b8 val 0x7f
   "
   this means imx6 pinctrl driver works as expected.

Signed-off-by: Peng Fan &lt;van.freenix@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: pinctrl: Add pinctrl driver for Microchip PIC32.</title>
<updated>2016-02-01T21:14:00+00:00</updated>
<author>
<name>Purna Chandra Mandal</name>
<email>purna.mandal@microchip.com</email>
</author>
<published>2016-01-28T10:00:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5f266c60bf036a4adad2b69c1597ff49104959da'/>
<id>5f266c60bf036a4adad2b69c1597ff49104959da</id>
<content type='text'>
In PIC32 pin-controller is a combined gpio-controller, pin-mux and
pin-config module. Remappable peripherals are assigned pins through
per-pin based muxing logic. And pin configuration are performed on
specific port registers which are shared along with gpio controller.
Note, non-remappable peripherals have default pins assigned thus
require no muxing.

Signed-off-by: Purna Chandra Mandal &lt;purna.mandal@microchip.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In PIC32 pin-controller is a combined gpio-controller, pin-mux and
pin-config module. Remappable peripherals are assigned pins through
per-pin based muxing logic. And pin configuration are performed on
specific port registers which are shared along with gpio controller.
Note, non-remappable peripherals have default pins assigned thus
require no muxing.

Signed-off-by: Purna Chandra Mandal &lt;purna.mandal@microchip.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Various Makefiles: Add SPDX-License-Identifier tags</title>
<updated>2015-11-10T14:19:52+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2015-11-10T01:06:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=da58dec866161e8ce73957fea463a8caad695000'/>
<id>da58dec866161e8ce73957fea463a8caad695000</id>
<content type='text'>
After consulting with some of the SPDX team, the conclusion is that
Makefiles are worth adding SPDX-License-Identifier tags too, and most of
ours have one.  This adds tags to ones that lack them and converts a few
that had full (or in one case, very partial) license blobs into the
equivalent tag.

Cc: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
After consulting with some of the SPDX team, the conclusion is that
Makefiles are worth adding SPDX-License-Identifier tags too, and most of
ours have one.  This adds tags to ones that lack them and converts a few
that had full (or in one case, very partial) license blobs into the
equivalent tag.

Cc: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: uniphier: add UniPhier pinctrl core support</title>
<updated>2015-09-23T14:21:32+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-09-11T11:17:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5dc626f836190fa2ef27f34e263b53641c14087c'/>
<id>5dc626f836190fa2ef27f34e263b53641c14087c</id>
<content type='text'>
The core support for the pinctrl drivers for all the UniPhier SoCs.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The core support for the pinctrl drivers for all the UniPhier SoCs.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rk3288: Add pinctrl driver</title>
<updated>2015-09-03T03:28:24+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-08-30T22:55:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bb4e4a5d9670ae6e996c22b4fba31aafb2d2a362'/>
<id>bb4e4a5d9670ae6e996c22b4fba31aafb2d2a362</id>
<content type='text'>
Add a driver which supports pin multiplexing setup for the most commonly
used peripherals.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a driver which supports pin multiplexing setup for the most commonly
used peripherals.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
