u-boot.git/drivers/pinctrl/Makefile, branch v2022.10

pinctrl: nuvoton: Add NPCM7xx pinctrl driver

2022-06-10T17:37:32Z

Add Nuvoton BMC NPCM750 Pinmux and Pinconf support. Signed-off-by: Jim Liu

Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi

2022-04-05T12:33:32Z

A big part is the DM pinctrl driver, which allows us to get rid of quite some custom pinmux code and make the whole port much more robust. Many thanks to Samuel for that nice contribution! There are some more or less cosmetic warnings about missing clocks right now, I will send the trivial fixes for that later. Another big chunk is the mkimage upgrade, which adds RISC-V and TOC0 (secure images) support. Both features are unused at the moment, but I have an always-secure board that will use that once the DT lands in the kernel. On top of those big things we have some smaller fixes, improving the I2C DM support, fixing some H6/H616 early clock setup and improving the eMMC boot partition support. The gitlab CI completed successfully, including the build test for all 161 sunxi boards. I also boot tested on a A64, A20, H3, H6, and F1C100 board. USB, SD card, eMMC, and Ethernet all work there (where applicable).

sunxi: pinctrl: Create the driver skeleton

2022-04-04T22:23:50Z

Create a do-nothing driver for each sunxi pin controller variant. Since only one driver can automatically bind to a DT node, since the GPIO driver already requires a manual binding process, and since the pinctrl driver needs access to some of the same information, refactor the GPIO driver to be bound by the pinctrl driver. This commit should cause no functional change. Signed-off-by: Samuel Holland Signed-off-by: Andre Przywara

Merge tag 'v2022.04-rc5' into next

2022-03-28T16:36:49Z

Prepare v2022.04-rc5

k210: use the board vendor name rather than the marketing name

2022-03-15T09:43:11Z

"kendryte" is the marketing name for the K210 RISC-V SoC produced by Canaan Inc. Rather than "kendryte,k210", use the usual "canaan,k210" vendor,SoC compatibility string format in the device tree files and use the SoC name for file names. With these changes, the device tree files are more in sync with the Linux kernel DTS and drivers, making uboot device tree usable by the kernel. Signed-off-by: Damien Le Moal Signed-off-by: Niklas Cassel Reviewed-by: Leo Yu-Chi Liang

pinctrl: zynqmp: Add pinctrl driver

2022-03-14T14:23:31Z

Add pinctrl driver for Xilinx ZynqMP SOC. This driver is compatible with linux device tree parameters for configuring pinmux and pinconf. Signed-off-by: Ashok Reddy Soma Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/2d7eefa83c8c0129f7243a25de56a289e948f6c6.1645626183.git.michal.simek@xilinx.com

pinctrl: Add Apple pinctrl driver

2021-11-17T22:04:58Z

This driver supports both pin muxing and GPIO support for the pin control logic found on Apple SoCs. Signed-off-by: Mark Kettenis

pinctrl: Add support for Kendryte K210 FPIOA

2020-10-08T15:42:36Z

The Fully-Programmable Input/Output Array (FPIOA) device controls pin multiplexing on the K210. The FPIOA can remap any supported function to any multifunctional IO pin. It can also perform basic GPIO functions, such as reading the current value of a pin. However, GPIO functionality remains largely unimplemented (in favor of the dedicated GPIO peripherals). Signed-off-by: Sean Anderson Reviewed-by: Simon Glass

powerpc, qe: add DTS support for parallel I/O ports

2020-09-17T04:09:53Z

add DM support for parallel I/O ports on QUICC Engine Block Signed-off-by: Heiko Schocher Patch-cc: Mario Six Patch-cc: Qiang Zhao Patch-cc: Holger Brunck Series-changes: 2 - remove RFC - fixed Codingstyle errors, therefore new patch powerpc, mpc83xx: fix codingstyle issues for qe_io.c - moved DM part to drivers/pinctrl Commit-notes: Open questions / discussion: - I let the old none DM based implementation in code so boards should work with old implementation. This should be removed if all boards are converted to DM/DTS. - Unfortunately linux DTS does not use "pinctrl-" properties, instead "pio-handle" properties. Even worser old U-Boot code initializes all pins defined in "const qe_iop_conf_t qe_iop_conf_tab[]" table in board code. As linux does the same I decided to also scan through all subnodes containing "pio-map" property and initialize them too. The proper solution would be to check for "pio-handle" when a device is probed. END

pinctrl: add nexell driver

2020-07-29T12:43:40Z

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - livetree API (dev_read_...) is used instead of fdt one (fdt...). - doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt added. Signed-off-by: Stefan Bosch