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<title>u-boot.git/drivers/pinctrl/Makefile, branch v2025.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Kbuild: Always use $(PHASE_)</title>
<updated>2025-04-11T18:16:44+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-01T22:55:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=302b41d5397e9f821d360a74335e8821d4513970'/>
<id>302b41d5397e9f821d360a74335e8821d4513970</id>
<content type='text'>
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge patch series "drivers: Driver support for ADI SC5xx SoCs"</title>
<updated>2025-03-12T16:25:13+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-03-12T16:25:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=81ef65099ed49c75281c3a8d3b6cb02abd2e009e'/>
<id>81ef65099ed49c75281c3a8d3b6cb02abd2e009e</id>
<content type='text'>
Greg Malysa &lt;malysagreg@gmail.com&gt; says:

This series adds all of the supported peripheral drivers for the sc5xx
series of SoCs from Analog Devices and other drivers that are used by
the evaluation kits, such as a GPIO expander used by the EZLITE carrier
boards. This series passes gitlab CI tests.

Link: https://lore.kernel.org/r/20250226173150.13198-1-malysagreg@gmail.com
</content>
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<pre>
Greg Malysa &lt;malysagreg@gmail.com&gt; says:

This series adds all of the supported peripheral drivers for the sc5xx
series of SoCs from Analog Devices and other drivers that are used by
the evaluation kits, such as a GPIO expander used by the EZLITE carrier
boards. This series passes gitlab CI tests.

Link: https://lore.kernel.org/r/20250226173150.13198-1-malysagreg@gmail.com
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: Add support for ADI SC5XX-family pinctrl</title>
<updated>2025-03-12T16:24:58+00:00</updated>
<author>
<name>Greg Malysa</name>
<email>malysagreg@gmail.com</email>
</author>
<published>2025-02-26T17:30:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=79ccd6c7dc7055d5bbe375fddef925d7986c204d'/>
<id>79ccd6c7dc7055d5bbe375fddef925d7986c204d</id>
<content type='text'>
This adds support for pin configuration on the Analog Devices SC5XX SoC
family. This commit is largely a port of the Linux driver, which has not
yet been submitted upstream.

Co-developed-by: Nathan Barrett-Morrison &lt;nathan.morrison@timesys.com&gt;
Signed-off-by: Nathan Barrett-Morrison &lt;nathan.morrison@timesys.com&gt;
Co-developed-by: Ian Roberts &lt;ian.roberts@timesys.com&gt;
Signed-off-by: Ian Roberts &lt;ian.roberts@timesys.com&gt;
Signed-off-by: Vasileios Bimpikas &lt;vasileios.bimpikas@analog.com&gt;
Signed-off-by: Utsav Agarwal &lt;utsav.agarwal@analog.com&gt;
Signed-off-by: Arturs Artamonovs &lt;arturs.artamonovs@analog.com&gt;
Signed-off-by: Oliver Gaskell &lt;Oliver.Gaskell@analog.com&gt;
Signed-off-by: Greg Malysa &lt;malysagreg@gmail.com&gt;
</content>
<content type='xhtml'>
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<pre>
This adds support for pin configuration on the Analog Devices SC5XX SoC
family. This commit is largely a port of the Linux driver, which has not
yet been submitted upstream.

Co-developed-by: Nathan Barrett-Morrison &lt;nathan.morrison@timesys.com&gt;
Signed-off-by: Nathan Barrett-Morrison &lt;nathan.morrison@timesys.com&gt;
Co-developed-by: Ian Roberts &lt;ian.roberts@timesys.com&gt;
Signed-off-by: Ian Roberts &lt;ian.roberts@timesys.com&gt;
Signed-off-by: Vasileios Bimpikas &lt;vasileios.bimpikas@analog.com&gt;
Signed-off-by: Utsav Agarwal &lt;utsav.agarwal@analog.com&gt;
Signed-off-by: Arturs Artamonovs &lt;arturs.artamonovs@analog.com&gt;
Signed-off-by: Oliver Gaskell &lt;Oliver.Gaskell@analog.com&gt;
Signed-off-by: Greg Malysa &lt;malysagreg@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: Drop special RZN1 entry from Makefile</title>
<updated>2025-03-11T22:05:57+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-02-28T12:02:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0e5f1b8f052bfc8f2a30ae4dd958371242b4b8dd'/>
<id>0e5f1b8f052bfc8f2a30ae4dd958371242b4b8dd</id>
<content type='text'>
The RZN1 symbol name is CONFIG_RZN1, there is no CONFIG_ARCH_RZN1.
Since RZN1 enables CONFIG_ARCH_RENESAS as well, remove the special
RZN1 entry from Makefile, the RZN1 pinctrl driver will still be
pulled in via CONFIG_ARCH_RENESAS.

Fixes: e4aea57fa773 ("pinctrl: renesas: add R906G032 driver")
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Reviewed-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
</content>
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<pre>
The RZN1 symbol name is CONFIG_RZN1, there is no CONFIG_ARCH_RZN1.
Since RZN1 enables CONFIG_ARCH_RENESAS as well, remove the special
RZN1 entry from Makefile, the RZN1 pinctrl driver will still be
pulled in via CONFIG_ARCH_RENESAS.

Fixes: e4aea57fa773 ("pinctrl: renesas: add R906G032 driver")
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Reviewed-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>global: Rename SPL_ to XPL_</title>
<updated>2024-10-11T17:44:48+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c46760d5967d12b6f7d37402878d1607a98b2b84'/>
<id>c46760d5967d12b6f7d37402878d1607a98b2b84</id>
<content type='text'>
Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: renesas: Rename ARCH_RMOBILE to ARCH_RENESAS</title>
<updated>2024-03-02T19:29:36+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2024-02-27T16:05:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f9aabd457930f5569297f8a0c4449b9768c1e0cf'/>
<id>f9aabd457930f5569297f8a0c4449b9768c1e0cf</id>
<content type='text'>
Rename ARCH_RMOBILE to ARCH_RENESAS because all the chips are made
by Renesas, while only a subset of them is from the R-Mobile
line.

Use the following command to perform the rename:

"
$ git grep -l 'ARCH_RMOBILE' | xargs -I {} sed -i 's@ARCH_RMOBILE@ARCH_RENESAS@g' {}
"

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Reviewed-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
</content>
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<pre>
Rename ARCH_RMOBILE to ARCH_RENESAS because all the chips are made
by Renesas, while only a subset of them is from the R-Mobile
line.

Use the following command to perform the rename:

"
$ git grep -l 'ARCH_RMOBILE' | xargs -I {} sed -i 's@ARCH_RMOBILE@ARCH_RENESAS@g' {}
"

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Reviewed-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: move out of mach-snapdragon</title>
<updated>2024-01-16T12:26:24+00:00</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2023-11-14T12:55:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=53b2c7af69464d06cc12fe96e8db6cabf201ba38'/>
<id>53b2c7af69464d06cc12fe96e8db6cabf201ba38</id>
<content type='text'>
Move the Qualcomm pinctrl drivers out of mach-snapdragon and over to the
rest of the pinctrl drivers, adjust the drivers so that support for each
platform can be enabled/disabled individually and introduce platform
specific configuration options.

Reviewed-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
<content type='xhtml'>
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<pre>
Move the Qualcomm pinctrl drivers out of mach-snapdragon and over to the
rest of the pinctrl drivers, adjust the drivers so that support for each
platform can be enabled/disabled individually and introduce platform
specific configuration options.

Reviewed-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: pinctrl: create Tegra DM pinctrl driver</title>
<updated>2023-12-19T19:24:30+00:00</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2023-11-26T15:54:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=91069320a55ae68d78381d578b1feffe75be721f'/>
<id>91069320a55ae68d78381d578b1feffe75be721f</id>
<content type='text'>
The existing pinctrl driver available for Tegra SOC is well
designed, but it lacks DM support. Let's add a DM compatible
overlay, which allows use of the device tree, along with preserving
backward compatibility with all existing setups and the ability
to use it in SPL board configuration stage.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The existing pinctrl driver available for Tegra SOC is well
designed, but it lacks DM support. Let's add a DM compatible
overlay, which allows use of the device tree, along with preserving
backward compatibility with all existing setups and the ability
to use it in SPL board configuration stage.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: add R906G032 driver</title>
<updated>2023-05-13T02:01:30+00:00</updated>
<author>
<name>Ralph Siemsen</name>
<email>ralph.siemsen@linaro.org</email>
</author>
<published>2023-05-13T01:36:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e4aea57fa773ada9443176e2e39af0b4e1750c65'/>
<id>e4aea57fa773ada9443176e2e39af0b4e1750c65</id>
<content type='text'>
Pinctrl/pinconf driver for Renesas RZ/N1 (R906G032) SoC.

This is quite rudimentary right now, and only supports applying a
default pin configuration as specified by the device tree.

Signed-off-by: Ralph Siemsen &lt;ralph.siemsen@linaro.org&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pinctrl/pinconf driver for Renesas RZ/N1 (R906G032) SoC.

This is quite rudimentary right now, and only supports applying a
default pin configuration as specified by the device tree.

Signed-off-by: Ralph Siemsen &lt;ralph.siemsen@linaro.org&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: starfive: Add StarFive JH7110 driver</title>
<updated>2023-04-20T08:08:44+00:00</updated>
<author>
<name>Kuan Lim Lee</name>
<email>kuanlim.lee@linux.starfivetech.com</email>
</author>
<published>2023-03-29T03:42:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=732f01aabf53ae97aff9acb92a43c6b3838e6c92'/>
<id>732f01aabf53ae97aff9acb92a43c6b3838e6c92</id>
<content type='text'>
Add pinctrl driver for StarFive JH7110 SoC.

Signed-off-by: Kuan Lim Lee &lt;kuanlim.lee@linux.starfivetech.com&gt;
Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Signed-off-by: Jianlong Huang &lt;jianlong.huang@starfivetech.com&gt;
Signed-off-by: Yanhong Wang &lt;yanhong.wang@starfivetech.com&gt;
Tested-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
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<pre>
Add pinctrl driver for StarFive JH7110 SoC.

Signed-off-by: Kuan Lim Lee &lt;kuanlim.lee@linux.starfivetech.com&gt;
Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Signed-off-by: Jianlong Huang &lt;jianlong.huang@starfivetech.com&gt;
Signed-off-by: Yanhong Wang &lt;yanhong.wang@starfivetech.com&gt;
Tested-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
