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<title>u-boot.git/drivers/pinctrl/mediatek, branch v2022.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl/mediatek?h=v2022.07</id>
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<updated>2022-05-05T13:29:58Z</updated>
<entry>
<title>pinctrl: mediatek: add support for different types of IO pins</title>
<updated>2022-05-05T13:29:58Z</updated>
<author>
<name>Sam Shih</name>
<email>sam.shih@mediatek.com</email>
</author>
<published>2022-04-21T06:23:53Z</published>
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<id>urn:sha1:1a80ef5520fc0751c5055d422810bf22c6c7e526</id>
<content type='text'>
There are many pins in an SoC, and register usage may vary by pins.
This patch introduces a concept of "io type" and "io type group"
to mediatek pinctrl drivers. This can provide different pinconf
handlers implementation (eg: "bias-pull-up/down", "driving" and
"input-enable") for IO pins that belong to different types.

Signed-off-by: Sam Shih &lt;sam.shih@mediatek.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: introduce multiple memory bases support</title>
<updated>2022-05-05T13:29:58Z</updated>
<author>
<name>Sam Shih</name>
<email>sam.shih@mediatek.com</email>
</author>
<published>2022-04-21T06:23:52Z</published>
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<id>urn:sha1:10334e0bc8884301466bbca9c474a8a580a3e7ee</id>
<content type='text'>
Pinctrl design of some mediatek SoC need to access registers that
distribute in multiple memory base address. this patch introduce new
mechanism in mediatek pinctrl driver to support the chips which have
the new design.

This patch add a member 'base_calc' in pinctrl private data, and changed
original 'base' private data to an array of *iomem.

When 'base_calc' attribute is set, it will requests multiplue regs base
from the DT, if 'base_calc' attribute is not set, it only use legacy way
to request single reg resource from the DT.

Signed-off-by: Sam Shih &lt;sam.shih@mediatek.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: rewrite mtk_pinconf_set and related functions</title>
<updated>2022-05-05T13:29:57Z</updated>
<author>
<name>Sam Shih</name>
<email>sam.shih@mediatek.com</email>
</author>
<published>2022-04-21T06:23:51Z</published>
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<id>urn:sha1:dafe0fbfb0f37e2d3be3e25a60975e1eb31ef8b7</id>
<content type='text'>
There are many pins in a SoCs, and different pin may belong
to different "io_type", For example: some pins of MT7622 belongs
to "io_type A", the other belongs to "io_type B", and pinctrl "V0"
means handle pinconf via "io_type A" or "io_type B", so SoCs that
contain "io_type A" and "io_type B" pins, use "V0" in pinctrl driver.

This patch separates the implementation of register operations
(e.g: "bias-pull-up/down", "driving" and "input-enable") into
different functions, and lets the original V0/V1
ops to call the new functions.

Signed-off-by: Sam Shih &lt;sam.shih@mediatek.com&gt;
</content>
</entry>
<entry>
<title>WS cleanup: remove trailing empty lines</title>
<updated>2021-09-30T12:08:56Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2021-09-27T15:42:36Z</published>
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<id>urn:sha1:66356b4c06c934021f6cb58d93877427162b369f</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>Rename GPIO_SUPPORT to GPIO</title>
<updated>2021-07-28T18:29:36Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-07-11T03:14:30Z</published>
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<id>urn:sha1:83061dbd1c893a9abd1b2566785e100448e3f6a3</id>
<content type='text'>
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: mt7629: add jtag function and pin group</title>
<updated>2021-03-20T20:24:27Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2021-03-05T02:22:31Z</published>
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<id>urn:sha1:a449cdb881d51117dcb5e87a4a538c5a720d7535</id>
<content type='text'>
The EPHY LEDs of mt7629 can be used as JTAG. This patch adds the jtag pin
group to the pinctrl driver.

Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: do not probe gpio driver if not enabled</title>
<updated>2021-03-20T20:24:27Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2021-03-05T02:22:26Z</published>
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<id>urn:sha1:70a2b4220e55105aa6c970589a6a96d2714751f4</id>
<content type='text'>
The mtk pinctrl driver is a combination driver with support for both
pinctrl and gpio. When this driver is used in SPL, gpio support may not be
enabled, and this will result in a compilation error.

To fix this, macros are added to make sure gpio related code will only be
compiled when gpio support is enabled.

Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: add get_pin_muxing ops for mediatek pinctrl</title>
<updated>2021-03-20T20:24:27Z</updated>
<author>
<name>Sam Shih</name>
<email>sam.shih@mediatek.com</email>
</author>
<published>2021-03-05T02:22:19Z</published>
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<id>urn:sha1:e254d2c0a44183b9ec1da81578a7bb7d548bdf60</id>
<content type='text'>
This patch add get_pin_muxing support for mediatek pinctrl drivers

Signed-off-by: Sam Shih &lt;sam.shih@mediatek.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: fix wrong assignment in mtk_get_pin_name</title>
<updated>2021-03-20T20:24:27Z</updated>
<author>
<name>Sam Shih</name>
<email>sam.shih@mediatek.com</email>
</author>
<published>2021-03-05T02:22:11Z</published>
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<id>urn:sha1:4fc5d4cedbbb567322849736bdee2687407add3f</id>
<content type='text'>
This is a bug fix for mtk pinctrl common part. Appearently pins should be
used instead of grps in mtk_get_pin_name().

Signed-off-by: Sam Shih &lt;sam.shih@mediatek.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: correct error handling</title>
<updated>2021-01-18T20:23:06Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2020-12-27T20:18:26Z</published>
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<id>urn:sha1:97bf73762fed743291bb7e572aa659374990b93d</id>
<content type='text'>
If no GPIO controller is found, the return value should not depend on a
random value on the stack. Initialize variable ret.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Acked-by: Chunfeng Yun &lt;chunfeng.yun@mediatek.com&gt;
</content>
</entry>
</feed>
