u-boot.git/drivers/pinctrl/mediatek, branch v2024.01

pinctrl: mediatek: add pinctrl driver for MT7988 SoC

2023-08-03T13:40:50Z

This patch adds pinctrl and gpio support for MT7988 SoC Signed-off-by: Weijie Gao

pinctrl: mediatek: add pinmux_set ops support

2023-08-03T13:40:50Z

This patch adds pinmux_set ops for mediatek pinctrl framework Signed-off-by: Sam Shih Signed-off-by: Weijie Gao

pinctrl: mediatek: fix the return value in driving configuration functions

2023-08-03T13:40:50Z

The original mediatek pinctrl functions for driving configuration 'mtk_pinconf_drive_set_*' do not return -ENOSUPP even if input parameters are not supported. This patch fixes the return value in those functions. Signed-off-by: Sam Shih Signed-off-by: Weijie Gao

pinctrl: mediatek: convert most definitions to const

2023-08-03T13:40:50Z

There exists a situation of the mediatek pinctrl driver that may return wrong pin function value for the pinmux driver: - All pin function arrays are defined without const - Some pin function arrays contain all-zero value, e.g.: static int mt7622_spi_funcs[] = { 0, 0, 0, 0, 0, 0, }; - These arrays will be put into .bss section during compilation - .bss section has no "a" attribute and does not exist in the final binary file after objcopy. - FDT binary blob is appended to the u-boot binary, which occupies the .bss section. - During board_f stage, .bss has not been initialized, and contains the data of FDT, which is not full-zero data. - pinctrl driver is initialized in board_f stage, and it will get wrong data if another driver is going to set default pinctrl. Since pinmux information and soc data are only meant to be read-only, thus should be declared as const. This will force all pinctrl data being put into .rodata section. Since .rodata has "a" attribute, even the all-zero data will be allocated and filled with correct value in to u-boot binary. Signed-off-by: Weijie Gao

pinctrl: mediatek: set R1/R0 in case pullen/pullsel succeeded

2023-05-03T13:05:24Z

Commit dafe0fbfb0f3 ("pinctrl: mediatek: rewrite mtk_pinconf_set and related functions") changed the logic deciding to set R0 and R1 registers for V1 devices. Before: /* Also set PUPD/R0/R1 if the pin has them */ err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PUPD, !pullup); if (err != -EINVAL) { mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R0, r0); mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R1, r1); } After: /* try pupd_r1_r0 if pullen_pullsel return error */ err = mtk_pinconf_bias_set_pullen_pullsel(dev, pin, disable, pullup, val); if (err) return mtk_pinconf_bias_set_pupd_r1_r0(dev, pin, disable, pullup, val); Tracing mtk_pinconf_bias_set_pullen_pullsel shows that the function always either returns 0 in case of success or -EINVAL in case any error has occurred. Hence the logic responsible of the decision to program R0 and R1 has been inverted. This leads to problems on BananaPi R2 (MT7623N) when booting from SDMMC, it turns out accessing eMMC no longer works since U-Boot 2022.07: MT7623> mmc dev 0 Card did not respond to voltage select! : -110 The problem wasn't detected for a long time as both eMMC and SDMMC work fine if they are used to boot from, and hence R0 and R1 were already setup by the bootrom and/or preloader. Fix the logic to restore the originally intended and correct behavior and also change the descriptive comment accordingly. Fixes: dafe0fbfb0f3 ("pinctrl: mediatek: rewrite mtk_pinconf_set and related functions") Signed-off-by: Daniel Golle Tested-By: Frank Wunderlich

pinctrl: mediatek: add pinctrl driver for MT7986 SoC

2022-09-23T19:09:15Z

This patch adds pinctrl and gpio support for MT7986 SoC Reviewed-by: Simon Glass Tested-by: Daniel Golle Signed-off-by: Weijie Gao

pinctrl: mediatek: add pinctrl driver for MT7981 SoC

2022-09-23T19:09:15Z

This patch adds pinctrl and gpio support for MT7981 SoC Reviewed-by: Simon Glass Signed-off-by: Weijie Gao

pinctrl: mediatek: add support for different types of IO pins

2022-05-05T13:29:58Z

There are many pins in an SoC, and register usage may vary by pins. This patch introduces a concept of "io type" and "io type group" to mediatek pinctrl drivers. This can provide different pinconf handlers implementation (eg: "bias-pull-up/down", "driving" and "input-enable") for IO pins that belong to different types. Signed-off-by: Sam Shih

pinctrl: mediatek: introduce multiple memory bases support

2022-05-05T13:29:58Z

Pinctrl design of some mediatek SoC need to access registers that distribute in multiple memory base address. this patch introduce new mechanism in mediatek pinctrl driver to support the chips which have the new design. This patch add a member 'base_calc' in pinctrl private data, and changed original 'base' private data to an array of *iomem. When 'base_calc' attribute is set, it will requests multiplue regs base from the DT, if 'base_calc' attribute is not set, it only use legacy way to request single reg resource from the DT. Signed-off-by: Sam Shih

pinctrl: mediatek: rewrite mtk_pinconf_set and related functions

2022-05-05T13:29:57Z

There are many pins in a SoCs, and different pin may belong to different "io_type", For example: some pins of MT7622 belongs to "io_type A", the other belongs to "io_type B", and pinctrl "V0" means handle pinconf via "io_type A" or "io_type B", so SoCs that contain "io_type A" and "io_type B" pins, use "V0" in pinctrl driver. This patch separates the implementation of register operations (e.g: "bias-pull-up/down", "driving" and "input-enable") into different functions, and lets the original V0/V1 ops to call the new functions. Signed-off-by: Sam Shih