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<title>u-boot.git/drivers/pinctrl/mscc/Makefile, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>pinctrl: mscc: Add gpio and pinctrl for Serval SoC family.</title>
<updated>2019-01-23T17:28:09+00:00</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-01-23T15:39:41+00:00</published>
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<id>5c31ce36e33d6e6216bfa56d176976eca017afb6</id>
<content type='text'>
The Serval SoC family has 32 pins. Currently there is no
support for Serval in Linux kernel.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
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<pre>
The Serval SoC family has 32 pins. Currently there is no
support for Serval in Linux kernel.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: mscc: Add gpio and pinctrl for Servalt SoC family.</title>
<updated>2019-01-23T17:27:26+00:00</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-01-17T14:33:26+00:00</published>
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<id>177c07f8293f510eaa3d802eae58c7ed0d664337</id>
<content type='text'>
The Servalt SoC family has 36 pins. Currently there is not support
for Servalt pinctrl in Linux kernel.

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</content>
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<pre>
The Servalt SoC family has 36 pins. Currently there is not support
for Servalt pinctrl in Linux kernel.

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: mscc: Add gpio and pinctrl for Jaguar2 SOC family</title>
<updated>2019-01-16T12:56:43+00:00</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-01-12T17:56:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=051de9b3eb445107b497dd9d92382f8cfa2781a1'/>
<id>051de9b3eb445107b497dd9d92382f8cfa2781a1</id>
<content type='text'>
The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common
to support new numbe of pins and remove any platform dependency from
mscc-common.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
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<pre>
The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common
to support new numbe of pins and remove any platform dependency from
mscc-common.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: mscc: Add gpio and pinctrl driver for MSCC MIPS SoCs (VcoreIII based)</title>
<updated>2018-12-19T14:23:01+00:00</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@bootlin.com</email>
</author>
<published>2018-12-08T08:59:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=53bdae241888de3d23a51735e9610389921b80ae'/>
<id>53bdae241888de3d23a51735e9610389921b80ae</id>
<content type='text'>
This driver supports the pin and gpio controller found in the Ocelot and
Luton SoCs.

The driver was inspired from the pinctrl driver in Linux, but was
simplified and was modified to allow supporting an other SoCs (Luton).

For Ocelot and Luton the controller is the same, only the pins to program
differ.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
[changed to only descend into mscc/ dependent on CONFIG_PINCTRL_MSCC]
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
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<pre>
This driver supports the pin and gpio controller found in the Ocelot and
Luton SoCs.

The driver was inspired from the pinctrl driver in Linux, but was
simplified and was modified to allow supporting an other SoCs (Luton).

For Ocelot and Luton the controller is the same, only the pins to program
differ.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
[changed to only descend into mscc/ dependent on CONFIG_PINCTRL_MSCC]
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
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</content>
</entry>
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