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<title>u-boot.git/drivers/pinctrl/mscc/mscc-common.h, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>pinctrl: mscc: Fix multiple definition error</title>
<updated>2021-07-07T14:17:54+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-05-03T20:48:56+00:00</published>
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With gcc-11 we get a multiple errors here as the declarations for
mscc_pinctrl_ops and mscc_gpio_ops are missing an extern.

CC: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Cc: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
Cc: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
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<pre>
With gcc-11 we get a multiple errors here as the declarations for
mscc_pinctrl_ops and mscc_gpio_ops are missing an extern.

CC: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Cc: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
Cc: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>pinctrl: mscc: Add gpio and pinctrl for Jaguar2 SOC family</title>
<updated>2019-01-16T12:56:43+00:00</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-01-12T17:56:55+00:00</published>
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<content type='text'>
The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common
to support new numbe of pins and remove any platform dependency from
mscc-common.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
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<pre>
The Jaguar2 SOC family has 63 gpio pins therefore I extended mscc-common
to support new numbe of pins and remove any platform dependency from
mscc-common.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>pinctrl: mscc: Add gpio and pinctrl driver for MSCC MIPS SoCs (VcoreIII based)</title>
<updated>2018-12-19T14:23:01+00:00</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@bootlin.com</email>
</author>
<published>2018-12-08T08:59:01+00:00</published>
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<id>53bdae241888de3d23a51735e9610389921b80ae</id>
<content type='text'>
This driver supports the pin and gpio controller found in the Ocelot and
Luton SoCs.

The driver was inspired from the pinctrl driver in Linux, but was
simplified and was modified to allow supporting an other SoCs (Luton).

For Ocelot and Luton the controller is the same, only the pins to program
differ.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
[changed to only descend into mscc/ dependent on CONFIG_PINCTRL_MSCC]
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
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<pre>
This driver supports the pin and gpio controller found in the Ocelot and
Luton SoCs.

The driver was inspired from the pinctrl driver in Linux, but was
simplified and was modified to allow supporting an other SoCs (Luton).

For Ocelot and Luton the controller is the same, only the pins to program
differ.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
[changed to only descend into mscc/ dependent on CONFIG_PINCTRL_MSCC]
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
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