u-boot.git/drivers/pinctrl/mvebu, branch v2020.04

dm: core: Create a new header file for 'compat' features

2020-02-06T02:33:46Z

At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass

dm: core: Require users of devres to include the header

2020-02-06T02:33:46Z

At present devres.h is included in all files that include dm.h but few make use of it. Also this pulls in linux/compat which adds several more headers. Drop the automatic inclusion and require files to include devres themselves. This provides a good indication of which files use devres. Signed-off-by: Simon Glass Reviewed-by: Anatolij Gustschin

mvebu: pinctrl: Add SD/eMMC PHY selector to the driver

2018-05-29T06:33:05Z

When the pin control driver selects SD/eMMC function for a pin group, there is additional configuration to be done for this case - switch the PHY to work with SDHCI interface. This patch adds the missing functionality into the pin control driver. Signed-off-by: Konstantin Porotchkin Reviewed-by: Stefan Roese Signed-off-by: Evan Wang Signed-off-by: Stefan Roese

mvebu: pinctrl: sync compatible string with Linux 4.17-rc4

2018-05-29T06:33:05Z

For pinctrl driver of mvebu, the compatible strings supported are defined differently from Linux version. The patch aligned the compatible string with Linux 4.17-rc4. Signed-off-by: Evan Wang Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese

SPDX: Convert all of our single license tags to Linux Kernel style

2018-05-07T13:34:12Z

When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini

arm64: a37xx: pinctrl: Correct mpp definitions

2018-03-30T10:52:48Z

This patch corrects below mpp definitions: - The sdio_sb group is composed of 6 pins and not 5; - The rgmii group contains pins mpp2[17:6] and not mpp2[19:6]; - Pin of group "pmic0" is mpp1[6] but not mpp1[16]; - Pin of group "pmic1" is mpp1[7] but not mpp1[17]; - A new group "smi" is added in A0 with 2 pins - mpp2[19:18], its bitmask is bit4; - Group "pcie1" has 3 pins in A0 - mpp2[5:3], its bit mask is bit5 | bit9 | bit10 but not bit4; - Group "ptp" has 3 pins in A0 as Z1, but its bitmask is changed to bit11 | bit12 | bit13. Reviewed-on: http://vgitil04.il.marvell.com:8080/43288 Tested-by: iSoC Platform CI Reviewed-by: Hua Jing Cc: Simon Glass Cc: Stefan Roese Signed-off-by: Ken Ma Signed-off-by: Stefan Roese

arm64: a37xx: pinctrl: Fix gpio pin offset in register

2018-03-30T10:52:48Z

For armada_37xx_update_reg(), the parameter offset should be pointer so that it can be updated, otherwise offset will keep old value, and then when offset is larger than or equal to 32 the mask calculated by "BIT(offset)" will be 0 in gpio chip hook functions, it's an error, this patch set offset parameter of armada_37xx_update_reg() as pointer. Reviewed-on: http://vgitil04.il.marvell.com:8080/43287 Reviewed-by: Hua Jing Tested-by: iSoC Platform CI Cc: Simon Glass Cc: Stefan Roese Signed-off-by: Ken Ma Signed-off-by: Stefan Roese

arm64: a37xx: pinctrl: Fix the pin 23 on south bridge

2018-03-30T10:52:48Z

Pin 23 on South bridge does not belong to the rgmii group. It belongs to a separate group which can have 3 functions. Due to this the fix also have to update the way the functions are managed. Until now each groups used NB_FUNCS(which was 2) functions. For the mpp23, 3 functions are available but it is the only group which needs it, so on the loop involving NB_FUNCS an extra test was added to handle only the functions added. The bug was visible when the gpio regulator used the gpio 23, the whole rgmii group was setup to gpio which broke the Ethernet support on the Armada 3720 DB board. Thanks to this patch, the UHS SD cards (which need the vqmmc) _and_ the Ethernet work again. Reviewed-on: http://vgitil04.il.marvell.com:8080/43284 Reviewed-by: Hua Jing Tested-by: iSoC Platform CI Cc: Simon Glass Cc: Stefan Roese Signed-off-by: Ken Ma Signed-off-by: Stefan Roese

arm64: a37xx: pinctrl: Fix number of pin in south bridge

2018-03-30T10:52:48Z

On the south bridge we have pin from 0 to 29, so it gives 30 pins (and not 29). Reviewed-on: http://vgitil04.il.marvell.com:8080/43285 Tested-by: iSoC Platform CI Reviewed-by: Hua Jing Cc: Simon Glass Cc: Stefan Roese Signed-off-by: Ken Ma Signed-off-by: Stefan Roese

pinctrl: mvebu: Make drivers depend on the pinctrl framework

2018-01-09T15:41:00Z

Armada pinctrl drivers shall not be compiled without the entire pinctrl framework and thus lack a "depends on" condition, otherwise the driver will simply not be probed. Signed-off-by: Miquel Raynal Signed-off-by: Stefan Roese