u-boot.git/drivers/pinctrl/nuvoton, branch master Unnamed repository; edit this file 'description' to name the repository. dts: fix typo in the pin name of GPIO191/GPIO192 2025-12-31T16:17:00+00:00 Stanley Chu yschu@nuvoton.com 2025-12-16T02:47:27+00:00 73a7155ba3e8e8a78dc2b65f815079b99ec1f41a Fix typos in the pin name of GPIO191 and GPIO192 Signed-off-by: Stanley Chu <yschu@nuvoton.com> 
Fix typos in the pin name of GPIO191 and GPIO192

Signed-off-by: Stanley Chu <yschu@nuvoton.com>
pinctrl: npcm8xx: Add smb11ddc pin config 2025-12-31T16:17:00+00:00 Stanley Chu yschu@nuvoton.com 2025-12-16T02:47:25+00:00 78dbe92cb0bd3ca527769dea199c9ab1300512ab smb11ddcm: connect SMB11 to external DDC pins smb11ddcs: connect SMB11 to internal GFXDDC Signed-off-by: Stanley Chu <yschu@nuvoton.com> 
smb11ddcm: connect SMB11 to external DDC pins
smb11ddcs: connect SMB11 to internal GFXDDC

Signed-off-by: Stanley Chu <yschu@nuvoton.com>
pinctrl: npcm8xx: add support for setting VCD input source 2025-08-18T22:40:23+00:00 Stanley Chu yschu@nuvoton.com 2025-08-07T05:32:19+00:00 ad3a33e57742bab08a8ca1a9e34c262b6fbf0268 Add pinmux for the VCD input to use the HSYNC signal. Signed-off-by: Stanley Chu <yschu@nuvoton.com> Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> 
Add pinmux for the VCD input to use the HSYNC signal.

Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
pinctrl: npcm8xx: clear all gpio events 2024-09-16T22:43:35+00:00 Stanley Chu yschu@nuvoton.com 2024-09-04T02:41:06+00:00 3aa2eac4f06de8ca5871543f21b88d568f33effc Clear all gpio events to avoid unexpected interrupts during kernel booting. Signed-off-by: Stanley Chu <yschu@nuvoton.com> 
Clear all gpio events to avoid unexpected interrupts
during kernel booting.

Signed-off-by: Stanley Chu <yschu@nuvoton.com>
pinctrl: npcm8xx: Add name for gpio function 2023-10-31T17:07:58+00:00 Jim Liu jim.t90615@gmail.com 2023-10-23T07:02:22+00:00 5572d23f024c5e8279291317bc1b4697c8a595df GPIO function name is needed in the debug log Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> 
GPIO function name is needed in the debug log

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
pinctrl: nuvoton: fix reset reason error for poweron 2023-07-14T16:52:18+00:00 Jim Liu jim.t90615@gmail.com 2023-07-04T08:00:12+00:00 0adbb8fbb1b64ae45b76cd6b1a639856d3a82de4 In non tip mode, BMC first power on with PORST+CORST. the gpio status will error. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> 
In non tip mode, BMC first power on with PORST+CORST.
the gpio status will error.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
pinctrl: nuvoton: set output state before enabling the output 2023-06-01T16:32:03+00:00 Jim Liu jim.t90615@gmail.com 2023-05-09T07:07:34+00:00 f517f61ba85e33dc283c7f714babcb146b7e7dc4 The default output state may be different to request, change the configuration sequence to avoid glitch. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> 
The default output state may be different to request,
change the configuration sequence to avoid glitch.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
pinctrl: nuvoton: add NPCM7xx/NPCM8xx reset type detect 2023-01-10T20:39:06+00:00 Jim Liu jim.t90615@gmail.com 2022-12-20T08:49:31+00:00 7ee1c4d1d125a1c76ff2d5d044f3844f74941cc4 add reset type detect and persist setting. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> 
add reset type detect and persist setting.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
pinctrl: nuvoton: Add NPCM8xx pinctrl driver 2022-11-02T17:31:40+00:00 Jim Liu jim.t90615@gmail.com 2022-10-11T08:09:13+00:00 1c1036499f737eeaa2dab4e56d7ff2c3447fce64 Add Nuvoton BMC NPCM845 Pinmux and Pinconf support. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Signed-off-by: Stanley Chu <yschu@nuvoton.com> 
Add Nuvoton BMC NPCM845 Pinmux and Pinconf support.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
pinctrl: nuvoton: fix set persist error 2022-10-11T19:40:48+00:00 Jim Liu jim.t90615@gmail.com 2022-09-13T06:23:15+00:00 45455e8ff5634e77aede803f9a772dba08b9674f CA9C is cortex A9 watchdog reset control bit. if device set persist mode, it shouldn't set this bit. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> 
CA9C is cortex A9 watchdog reset control bit.
if device set persist mode, it shouldn't set this bit.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>