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<title>u-boot.git/drivers/pinctrl/nxp, branch v2020.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl/nxp?h=v2020.04</id>
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<updated>2020-02-06T02:33:46Z</updated>
<entry>
<title>dm: core: Create a new header file for 'compat' features</title>
<updated>2020-02-06T02:33:46Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-02-03T14:36:16Z</published>
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<id>urn:sha1:336d4615f8fa774557d14f9b3245daa9e5fe3dbc</id>
<content type='text'>
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: core: Require users of devres to include the header</title>
<updated>2020-02-06T02:33:46Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-02-03T14:36:15Z</published>
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<id>urn:sha1:61b29b82683863a970fd4609a7c58512872616bc</id>
<content type='text'>
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</content>
</entry>
<entry>
<title>pinctrl: add i.MXRT driver</title>
<updated>2020-01-14T21:53:59Z</updated>
<author>
<name>Giulio Benetti</name>
<email>giulio.benetti@benettiengineering.com</email>
</author>
<published>2020-01-10T14:47:02Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=916ce98127ab6e78b1a1fafb76a5a3cfc7c4e0a3'/>
<id>urn:sha1:916ce98127ab6e78b1a1fafb76a5a3cfc7c4e0a3</id>
<content type='text'>
Add i.MXRT pinctrl driver.

Signed-off-by: Giulio Benetti &lt;giulio.benetti@benettiengineering.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: imx8m: support i.MX8MP</title>
<updated>2020-01-08T12:20:08Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2019-12-30T01:52:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d8293e984b51e11d4f55d4ec5efa513368786e6c'/>
<id>urn:sha1:d8293e984b51e11d4f55d4ec5efa513368786e6c</id>
<content type='text'>
Add i.MX8MP compatible to let the pinctrl driver could support
i.MX8MP.

Reviewed-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: imx8m: support i.MX8MN</title>
<updated>2019-11-05T09:27:18Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2019-09-16T03:09:42Z</published>
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<id>urn:sha1:b6f2945227ce59498c2cba93eddc7600ba0d2cd2</id>
<content type='text'>
Support i.MX8MN in imx8m pinctrl driver

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: nxp: DM_FLAG_PRE_RELOC by default</title>
<updated>2019-10-08T14:36:37Z</updated>
<author>
<name>Igor Opaniuk</name>
<email>igor.opaniuk@toradex.com</email>
</author>
<published>2019-07-24T15:09:57Z</published>
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<id>urn:sha1:c115cd154c1da885299e461cda93c9fc4edc952d</id>
<content type='text'>
For NXP SoCs we have to set pinmux configuration ASAP (ideally
before relocation) to get serial console working. Without this we miss
almost the half of output (U-boot version, CPU defails, Reset cause,
DRAM details etc.).

To achieve this we need to force appropriate pinctrl drivers to get
probed before relocation.

Fixes: cd69e8ef9b ("colibri-imx6ull: migrate pinctrl and regulators to dtb/dm")
Signed-off-by: Igor Opaniuk &lt;igor.opaniuk@toradex.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@gmail.com&gt;
Reviewed-by: Lukasz Majewski &lt;lukma@denx.de&gt;
Reviewed-by: Oleksandr Suvorov &lt;oleksandr.suvorov@toradex.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: imx: use devfdt_get_addr_size_index</title>
<updated>2019-10-08T14:35:16Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2019-08-06T10:05:48Z</published>
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<id>urn:sha1:39ebb4187db15641117228f2579ff421cfe0df90</id>
<content type='text'>
fdtdec_get_addr_size could not parse addr/size correctly is
using address-cells 2 and size-cells 2 on an ARM32 SoC.
So switch to use devfdt_get_addr_size_index.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mxs: Add support for i.MX2[38] mxs pinctrl driver</title>
<updated>2019-07-19T12:57:14Z</updated>
<author>
<name>Lukasz Majewski</name>
<email>lukma@denx.de</email>
</author>
<published>2019-06-19T15:31:06Z</published>
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<id>urn:sha1:0f666533106adee28ef1848e845466a6907b3745</id>
<content type='text'>
The code responsible for setting proper values in the MUX registers
(in the mxs_pinctrl_set_state()) has been ported from Linux kernel
- SHA1: 17bb763e7eaf tag v5.1.11 from linux-stable.

As the pinctrl node in the imx28.dtsi file has gpio pins nodes as subnodes,
it was necessary to use 'dm_scan_fdt_dev()' (as a .bind method) to also
make them 'visible' by the DM's "gpio_mxs" driver.

Signed-off-by: Lukasz Majewski &lt;lukma@denx.de&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>pinctrl: imx: Define imx6_pinctrl_soc_info in .data section</title>
<updated>2019-06-11T08:43:00Z</updated>
<author>
<name>Lukasz Majewski</name>
<email>lukma@denx.de</email>
</author>
<published>2019-04-23T14:44:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c0df121a97d869c23c557b85aebb0b5689d954dd'/>
<id>urn:sha1:c0df121a97d869c23c557b85aebb0b5689d954dd</id>
<content type='text'>
This commit is necessary to be able to re-use the pinctrl code in early
SPL to properly configure pins.

The problem is that those "static" structures (without explicit
initialization) are placed in the SDRAM area, which corresponds to
u-boot proper (not even SPL).
Hence, when one wants to configure pins before relocation via DTS/DM,
the board hangs (imx6q SoC powered one) as only OCRAM area is available
(0x009xxxxx).

This commit prevents from this issue by moving the imx6_pinctrl_soc_info
structure to data section (from BSS).

Signed-off-by: Lukasz Majewski &lt;lukma@denx.de&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: imx8: add i.MX8QM compatible</title>
<updated>2019-04-25T15:03:25Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2019-03-05T02:32:13Z</published>
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<id>urn:sha1:a413c17e41a36e1937dd89d0cffa36e96c3b3c8c</id>
<content type='text'>
Add i.MX8QM compatible

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
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