u-boot.git/drivers/pinctrl/qcom/Makefile, branch next Unnamed repository; edit this file 'description' to name the repository. drivers: pinctrl: Add Qualcomm SM6125 TLMM driver 2026-05-18T09:04:14+00:00 Biswapriyo Nath nathbappai@gmail.com 2026-02-04T16:10:54+00:00 60bc1eb8c2f17ee53b566b27da1d11c5cdc25e76 Add support for TLMM pin controller block (Top Level Mode Multiplexer) on SM6125 SoC, with support for special pins. Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com> Reviewed-by: Casey Connolly <casey.connolly@linaro.org> soc98: input: 1 [x] mmc@4784000.cd-gpios soc98: input: 0 [x] mmc@4784000.cd-gpios Link: https://patch.msgid.link/20260204-sm6125-clk-pinctrl-v1-3-9cf4c556557a@gmail.com Signed-off-by: Casey Connolly <casey.connolly@linaro.org> 
Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on SM6125 SoC, with support for special pins.

Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
soc98: input: 1 [x] mmc@4784000.cd-gpios
soc98: input: 0 [x] mmc@4784000.cd-gpios
Link: https://patch.msgid.link/20260204-sm6125-clk-pinctrl-v1-3-9cf4c556557a@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
drivers: pinctrl: Add Qualcomm Milos TLMM driver 2026-04-27T10:38:44+00:00 Luca Weiss luca.weiss@fairphone.com 2026-03-18T12:46:27+00:00 8e4fd3d1c31ff7df1dbc7771af16f0f87f5bade4 Add support for TLMM pin controller block (Top Level Mode Multiplexer) on Milos SoC, with support for special pins. Correct pin configuration is required for working debug UART and eMMC/SD cards. Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://patch.msgid.link/20260318-milos-bringup-v2-1-650b91dd75d8@fairphone.com Signed-off-by: Casey Connolly <casey.connolly@linaro.org> 
Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on Milos SoC, with support for special pins.

Correct pin configuration is required for working debug UART and eMMC/SD
cards.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-1-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
pinctrl: qcom: add driver for QCS615 SoC 2026-01-14T15:25:09+00:00 Aswin Murugan aswin.murugan@oss.qualcomm.com 2025-11-12T16:47:57+00:00 46a66c02e9d5211f9c5b2380246680e6bfb31ff5 Add pinctrl driver for QCS615. Driver code is based on the similar U-Boot and Linux drivers. Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20251112164758.1560041-2-aswin.murugan@oss.qualcomm.com Signed-off-by: Casey Connolly <casey.connolly@linaro.org> 
Add pinctrl driver for QCS615. Driver code is based on the
similar U-Boot and Linux drivers.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20251112164758.1560041-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
pinctrl: qcom: add SM7150 pinctrl driver 2025-10-29T11:27:33+00:00 Danila Tikhonov danila@jiaxyga.com 2025-08-31T00:46:00+00:00 23fc229eb422cb48c0786869cb90bd3f2b24839b This SoC features a pinctrl block with north, south, and west tiles accessible to the AP. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Co-developed-by: Jens Reidel <adrian@mainlining.org> Signed-off-by: Jens Reidel <adrian@mainlining.org> Link: https://lore.kernel.org/r/20250831004602.699953-3-adrian@mainlining.org Signed-off-by: Casey Connolly <kcxt@postmarketos.org> 
This SoC features a pinctrl block with north, south, and west tiles
accessible to the AP.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Co-developed-by: Jens Reidel <adrian@mainlining.org>
Signed-off-by: Jens Reidel <adrian@mainlining.org>
Link: https://lore.kernel.org/r/20250831004602.699953-3-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
drivers: pinctrl: Add Qualcomm SM6350 TLMM driver 2025-10-29T11:27:33+00:00 Luca Weiss luca.weiss@fairphone.com 2025-09-17T12:47:36+00:00 5af87d808841bfa48242deae4d86b7858d36479b Add support for TLMM pin controller block (Top Level Mode Multiplexer) on SM6350 SoC, with support for special pins. Correct pin configuration is required for working debug UART and eMMC/SD cards. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> 
Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on SM6350 SoC, with support for special pins.

Correct pin configuration is required for working debug UART and eMMC/SD
cards.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
pinctrl: qcom: add sdm670 pinctrl driver 2025-10-29T11:27:32+00:00 David Wronek david.wronek@mainlining.org 2025-10-03T10:01:11+00:00 f977cee37252c6f1d215f76c2905cd8823b03fdb Add a pinctrl driver for the TLMM block found in the SDM670 SoC. Signed-off-by: David Wronek <david.wronek@mainlining.org> Link: https://lore.kernel.org/r/20251003-sdm670-v2-3-52c0fa481286@mainlining.org Signed-off-by: Casey Connolly <kcxt@postmarketos.org> 
Add a pinctrl driver for the TLMM block found in the SDM670 SoC.

Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-3-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
pinctrl: qcom: Add ipq5424 pinctrl driver 2025-06-23T16:50:21+00:00 Varadarajan Narayanan quic_varada@quicinc.com 2025-03-04T11:01:04+00:00 c4aa86c04f59a79cbfe938bd32cc676d48a083d3 Add pinctrl driver for the TLMM block found in the ipq5424 SoC. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Reviewed-by: Casey Connolly <casey.connolly@linaro.org> Link: https://lore.kernel.org/r/20250304110105.2762124-6-quic_varada@quicinc.com Signed-off-by: Casey Connolly <casey.connolly@linaro.org> 
Add pinctrl driver for the TLMM block found in the ipq5424 SoC.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-6-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
drivers: pinctrl: Add Qualcomm SDM630/660 TLMM driver 2025-04-11T13:25:51+00:00 Alexey Minnekhanov alexeymin@postmarketos.org 2025-03-31T15:55:31+00:00 b4420a0c9ed446a9dbb5439d543d7c74344a5099 Add support for TLMM pin controller block (Top Level Mode Multiplexer) on SDM630/660 SoCs, with support for special pins. Correct pin configuration is required for working debug UART and eMMC/SD cards. SDM630 and SDM660 TLMM blocks are the same. Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Link: https://lore.kernel.org/r/20250331155531.3638165-1-alexeymin@postmarketos.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> 
Add support for TLMM pin controller block (Top Level Mode
Multiplexer) on SDM630/660 SoCs, with support for special pins.

Correct pin configuration is required for working debug UART
and eMMC/SD cards.

SDM630 and SDM660 TLMM blocks are the same.

Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250331155531.3638165-1-alexeymin@postmarketos.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
pinctrl: qcom: add driver for SA8775P SoC 2025-04-10T13:43:09+00:00 Varadarajan Narayanan quic_varada@quicinc.com 2025-03-24T08:05:03+00:00 5effb1e62556e5d84c2fc037f7020d26cdf3b9ca Add pinctrl and GPIO driver for SA8775P. Driver code is based on the similar U-Boot and Linux drivers. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Link: https://lore.kernel.org/r/20250324080504.2385747-1-quic_varada@quicinc.com Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> 
Add pinctrl and GPIO driver for SA8775P. Driver code is based on the
similar U-Boot and Linux drivers.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250324080504.2385747-1-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
pinctrl: qcom: add sc7280 pinctrl driver 2025-03-17T13:38:18+00:00 Caleb Connolly caleb.connolly@linaro.org 2025-01-22T15:02:51+00:00 51ec7fdb64b3523915a3199826495368e4c5d033 Introduce a pinctrl driver for SC7280/QCM6490, this is used by the RB3 Gen 2, FairPhone 5 and other devices. Tested-by: Christopher Obbard <christopher.obbard@linaro.org> Link: https://lore.kernel.org/r/20250122-pinctrl-sc7280-v1-1-8bdba72e6366@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> 
Introduce a pinctrl driver for SC7280/QCM6490, this is used by the RB3
Gen 2, FairPhone 5 and other devices.

Tested-by: Christopher Obbard <christopher.obbard@linaro.org>
Link: https://lore.kernel.org/r/20250122-pinctrl-sc7280-v1-1-8bdba72e6366@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>