u-boot.git/drivers/pinctrl/qcom, branch master

drivers: pinctrl: Add Qualcomm Milos TLMM driver

2026-04-27T10:38:44+00:00

Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on Milos SoC, with support for special pins.

Correct pin configuration is required for working debug UART and eMMC/SD
cards.

Reviewed-by: Sumit Garg 
Signed-off-by: Luca Weiss 
Link: https://patch.msgid.link/20260318-milos-bringup-v2-1-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly

pinctrl: qcom: Add pingroup definitions for SC7280

2026-04-27T10:33:29+00:00

Added pingrp support to sc7280 pinctrl driver based on the
similar U-Boot and Linux drivers.

Signed-off-by: Aswin Murugan 
Reviewed-by: Varadarajan Narayanan 
Reviewed-by: Sumit Garg 
Link: https://patch.msgid.link/20251112165459.1560966-1-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly

pinctrl: qcom: add PINCTRL_QCOM_GENERIC to enable all drivers by default

2026-01-14T15:25:09+00:00

Introduce a new Kconfig option PINCTRL_QCOM_GENERIC that, when selected,
enables all Qualcomm pinctrl drivers by default. This simplifies defconfigs
for platforms supporting multiple SoCs and avoids manual driver selection.
Individual drivers can still be disabled if required.

Signed-off-by: Aswin Murugan 
Reviewed-by: Casey Connolly 
Link: https://patch.msgid.link/20260107154745.571319-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly

pinctrl: qcom: add driver for QCS615 SoC

2026-01-14T15:25:09+00:00

Add pinctrl driver for QCS615. Driver code is based on the
similar U-Boot and Linux drivers.

Signed-off-by: Aswin Murugan 
Reviewed-by: Neil Armstrong 
Link: https://patch.msgid.link/20251112164758.1560041-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly

pinctrl: qcom: add SM7150 pinctrl driver

2025-10-29T11:27:33+00:00

This SoC features a pinctrl block with north, south, and west tiles
accessible to the AP.

Signed-off-by: Danila Tikhonov 
Co-developed-by: Jens Reidel 
Signed-off-by: Jens Reidel 
Link: https://lore.kernel.org/r/20250831004602.699953-3-adrian@mainlining.org
Signed-off-by: Casey Connolly

drivers: pinctrl: Add Qualcomm SM6350 TLMM driver

2025-10-29T11:27:33+00:00

Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on SM6350 SoC, with support for special pins.

Correct pin configuration is required for working debug UART and eMMC/SD
cards.

Reviewed-by: Neil Armstrong 
Signed-off-by: Luca Weiss

pinctrl: qcom: sc7280: Fix offset of UFS_RESET

2025-10-29T11:27:33+00:00

There's no WEST, SOUTH or NORTH in sc7280 pinctrl. Fix the offset of the
ufs_reset pin.

Fixes: 51ec7fdb64b ("pinctrl: qcom: add sc7280 pinctrl driver")
Signed-off-by: Luca Weiss 
Reviewed-by: Neil Armstrong 
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-1-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly

pinctrl: qcom: add sdm670 pinctrl driver

2025-10-29T11:27:32+00:00

Add a pinctrl driver for the TLMM block found in the SDM670 SoC.

Signed-off-by: David Wronek 
Link: https://lore.kernel.org/r/20251003-sdm670-v2-3-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly

pinctrl: qcom: sdm845: Limit check off by 1

2025-08-13T13:18:49+00:00

The driver specifies 154 pins so should have a maximum selector of 153
to ensure that the index into the array special_pins_names does not
overflow.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody 
Link: https://lore.kernel.org/r/20250807-pinctrl_qcom-v1-2-42fac6707fd5@linaro.org
Signed-off-by: Casey Connolly

pinctrl: qcom: sa8775: Limit check for array index not correct

2025-08-13T13:18:49+00:00

In sa8775p_get_pin_name the limit check for the index into
msm_special_pins_data allows for more elements than exist. Add code to
ensure the array index remains in bounds.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody 
Link: https://lore.kernel.org/r/20250807-pinctrl_qcom-v1-1-42fac6707fd5@linaro.org
Signed-off-by: Casey Connolly