u-boot.git/drivers/pinctrl/qcom, branch v2025.04-rc2Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl/qcom?h=v2025.04-rc22025-01-22T15:35:39Zpinctrl: qcom: x1e80100: add pcie[3456ab]_clk functions2025-01-22T15:35:39ZNeil Armstrongneil.armstrong@linaro.org2024-11-25T08:29:12Zurn:sha1:767a1e57fa1f2a74384512a890abe74c17080a50
Add the missing PCIe clk_req function for the x1e80100 TLMM.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-pinctrl-v1-3-4df323d90397@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
pinctrl: qcom: sm8650: add pcie[01]_clk_req_n function2025-01-22T15:35:39ZNeil Armstrongneil.armstrong@linaro.org2024-11-25T08:29:11Zurn:sha1:7acf090d27091ca836aed690666bc82690a9f396
Add the missing PCIe clk_req functions for the SM8650 TLMM.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-pinctrl-v1-2-4df323d90397@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
pinctrl: qcom: sm8550: add pcie1_clk_req_n function2025-01-22T15:35:39ZNeil Armstrongneil.armstrong@linaro.org2024-11-25T08:29:10Zurn:sha1:7ca1b3f0d998a078838cfe18b252f8fb548a5016
Add the missing PCIe clk_req function for the SM8550 TLMM.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-pinctrl-v1-1-4df323d90397@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
pinctrl: qcom: Add X1E80100 pinctrl driver2025-01-22T15:35:02ZNeil Armstrongneil.armstrong@linaro.org2024-11-15T15:44:15Zurn:sha1:51a142363d425cec0781c273041a8fef56712ec9
Add pinctrl driver for the TLMM block found in the X1E80100 SoC.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # Yoga Slim 7x
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20241115-topic-x1e80100-pinctrl-v1-1-35f984226e47@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
pinctr: qcom: sm8250: add special pins pins configuration data2024-10-04T12:57:03ZNeil Armstrongneil.armstrong@linaro.org2024-09-11T18:07:15Zurn:sha1:58fa5204247182dca345ea920c86073fb09e449a
Add the special pins configuration data to allow setup the bias
of the UFS and SDCard pins on the SM8250 SoC.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
pinctrl: qcom: add driver for SM8150 SoC2024-10-04T12:57:01ZJulius Lehmannlehmanju@devpi.de2024-09-11T17:13:10Zurn:sha1:a9a8f97e006e9397b2c346f6e384b7dfa6c5619c
Add pinctrl and GPIO driver for SM8150. Driver code is based on the
similar U-Boot drivers. All constants are taken from the corresponding
Linux driver. This drivers differs from the similar U-Boot drivers,
because SM8150 SoC have different function IDs for the same functions
on different pins.
Co-authored-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Julius Lehmann <lehmanju@devpi.de>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
pinctrl: qcom: sm8650: add special pins pins configuration data2024-07-05T10:04:48ZNeil Armstrongneil.armstrong@linaro.org2024-05-28T08:31:57Zurn:sha1:951937b23d1cd709b82ec476b94b9300a0ddd17e
Add the special pins configuration data to allow setup the bias
of the UFS and SDCard pins on the SM8650 SoC.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
pinctrl: qcom: sm8550: add special pins pins configuration data2024-07-05T10:04:48ZNeil Armstrongneil.armstrong@linaro.org2024-05-28T08:31:56Zurn:sha1:c89ab4aa1732ae661c2c0cdccd27d1d3469aab00
Add the special pins configuration data to allow setup the bias
of the UFS and SDCard pins on the SM8550 SoC.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
pinctrl: qcom: add support setting pin configuration for special pins2024-07-05T10:04:48ZNeil Armstrongneil.armstrong@linaro.org2024-05-28T08:31:55Zurn:sha1:0e044c8098b9b70916d3d2de10958408c6ea95c2
Use the previously introduced msm_special_pin_data to setup the special
pins configuration if the SoC driver have them specified.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
pinctrl: qcom: add support for bias-pull-down2024-07-05T10:04:48ZNeil Armstrongneil.armstrong@linaro.org2024-05-28T08:31:53Zurn:sha1:e948fe5f01dafa07f6fc3e1fcae1354983e5f5a7
Add support for bias-pull-down as an alternate of bias-pull-up.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>