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<title>u-boot.git/drivers/pinctrl/qcom, branch v2025.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>pinctrl: qcom: sdm845: Limit check off by 1</title>
<updated>2025-08-13T13:18:49+00:00</updated>
<author>
<name>Andrew Goodbody</name>
<email>andrew.goodbody@linaro.org</email>
</author>
<published>2025-08-07T11:20:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d9fbc1d70bc9d5e7665c9fc1ed71d25e04faba54'/>
<id>d9fbc1d70bc9d5e7665c9fc1ed71d25e04faba54</id>
<content type='text'>
The driver specifies 154 pins so should have a maximum selector of 153
to ensure that the index into the array special_pins_names does not
overflow.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody &lt;andrew.goodbody@linaro.org&gt;
Link: https://lore.kernel.org/r/20250807-pinctrl_qcom-v1-2-42fac6707fd5@linaro.org
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
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<pre>
The driver specifies 154 pins so should have a maximum selector of 153
to ensure that the index into the array special_pins_names does not
overflow.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody &lt;andrew.goodbody@linaro.org&gt;
Link: https://lore.kernel.org/r/20250807-pinctrl_qcom-v1-2-42fac6707fd5@linaro.org
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: sa8775: Limit check for array index not correct</title>
<updated>2025-08-13T13:18:49+00:00</updated>
<author>
<name>Andrew Goodbody</name>
<email>andrew.goodbody@linaro.org</email>
</author>
<published>2025-08-07T11:20:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=be12b6e158a06580437f2e4756eb6021cf0cbfbe'/>
<id>be12b6e158a06580437f2e4756eb6021cf0cbfbe</id>
<content type='text'>
In sa8775p_get_pin_name the limit check for the index into
msm_special_pins_data allows for more elements than exist. Add code to
ensure the array index remains in bounds.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody &lt;andrew.goodbody@linaro.org&gt;
Link: https://lore.kernel.org/r/20250807-pinctrl_qcom-v1-1-42fac6707fd5@linaro.org
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
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<pre>
In sa8775p_get_pin_name the limit check for the index into
msm_special_pins_data allows for more elements than exist. Add code to
ensure the array index remains in bounds.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody &lt;andrew.goodbody@linaro.org&gt;
Link: https://lore.kernel.org/r/20250807-pinctrl_qcom-v1-1-42fac6707fd5@linaro.org
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: Add ipq5424 pinctrl driver</title>
<updated>2025-06-23T16:50:21+00:00</updated>
<author>
<name>Varadarajan Narayanan</name>
<email>quic_varada@quicinc.com</email>
</author>
<published>2025-03-04T11:01:04+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c4aa86c04f59a79cbfe938bd32cc676d48a083d3'/>
<id>c4aa86c04f59a79cbfe938bd32cc676d48a083d3</id>
<content type='text'>
Add pinctrl driver for the TLMM block found in the ipq5424 SoC.

Signed-off-by: Varadarajan Narayanan &lt;quic_varada@quicinc.com&gt;
Reviewed-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
Link: https://lore.kernel.org/r/20250304110105.2762124-6-quic_varada@quicinc.com
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
<content type='xhtml'>
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<pre>
Add pinctrl driver for the TLMM block found in the ipq5424 SoC.

Signed-off-by: Varadarajan Narayanan &lt;quic_varada@quicinc.com&gt;
Reviewed-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
Link: https://lore.kernel.org/r/20250304110105.2762124-6-quic_varada@quicinc.com
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge patch series "Qualcomm: cleanup OF_LIVE fixup and fix RB1/2"</title>
<updated>2025-05-02T14:38:27+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-05-02T14:38:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4ca87fd18c1b718be423755939a6e5b1688869f5'/>
<id>4ca87fd18c1b718be423755939a6e5b1688869f5</id>
<content type='text'>
Caleb Connolly &lt;caleb.connolly@linaro.org&gt; says:

Introduce a new event to signal that the live tree has been built,
allowing boards to perform fixups on the tree before devices are bound.
Crucially this allows for devices to be enabled or disabled, but also
allows for properties that are parsed during the bind stage to be
modified (such as dr_mode for dwc3).

With this in place, mach-snapdragon is switched over to use the event
and some hacky U-Boot specific DT overrides (which had to be undone
prior to booting an image) are removed in favour of fixing up the
livetree (which is not passed on to further boot stages).

Finally, some minor fixes are made for the QCM2290 RB1 board, the sdcard
is enabled and it now uses USB host mode in U-Boot like it's bigger
sibling the RB2.

Link: https://lore.kernel.org/r/20250411-livetree-fixup-v2-0-1236823377bb@linaro.org
</content>
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<pre>
Caleb Connolly &lt;caleb.connolly@linaro.org&gt; says:

Introduce a new event to signal that the live tree has been built,
allowing boards to perform fixups on the tree before devices are bound.
Crucially this allows for devices to be enabled or disabled, but also
allows for properties that are parsed during the bind stage to be
modified (such as dr_mode for dwc3).

With this in place, mach-snapdragon is switched over to use the event
and some hacky U-Boot specific DT overrides (which had to be undone
prior to booting an image) are removed in favour of fixing up the
livetree (which is not passed on to further boot stages).

Finally, some minor fixes are made for the QCM2290 RB1 board, the sdcard
is enabled and it now uses USB host mode in U-Boot like it's bigger
sibling the RB2.

Link: https://lore.kernel.org/r/20250411-livetree-fixup-v2-0-1236823377bb@linaro.org
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: qcm2290: fix off by 1 in pin_count</title>
<updated>2025-05-02T14:38:03+00:00</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2025-04-11T12:47:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2803a466a96153ab01c5789321e48397b6bae9c7'/>
<id>2803a466a96153ab01c5789321e48397b6bae9c7</id>
<content type='text'>
There are 134 pins not 133, oops! This fixes the sdcard on the RB1 as
the pins now all get configured correctly.

Fixes: 0ecb8cfcb930 ("pinctrl: qcom: add qcm2290 pinctrl driver")
Reviewed-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Tested-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
<content type='xhtml'>
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<pre>
There are 134 pins not 133, oops! This fixes the sdcard on the RB1 as
the pins now all get configured correctly.

Fixes: 0ecb8cfcb930 ("pinctrl: qcom: add qcm2290 pinctrl driver")
Reviewed-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Tested-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: handle reserved ranges</title>
<updated>2025-04-11T13:30:21+00:00</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2025-04-10T08:52:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=91ba4976c05882f88232eaa4fc5eb9192701dbe3'/>
<id>91ba4976c05882f88232eaa4fc5eb9192701dbe3</id>
<content type='text'>
Some Qualcomm boards feature reserved ranges of pins which are protected
by firmware. Attempting to read or write any registers associated with
these pins results the board resetting.

Add support for parsing these ranges from devicetree and ensure that the
pinctrl and GPIO drivers don't try to interact with these pins.

Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Reviewed-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20250410-topic-sm8x50-pinctrl-reserved-ranges-v2-1-654488392b9a@linaro.org
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some Qualcomm boards feature reserved ranges of pins which are protected
by firmware. Attempting to read or write any registers associated with
these pins results the board resetting.

Add support for parsing these ranges from devicetree and ensure that the
pinctrl and GPIO drivers don't try to interact with these pins.

Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Reviewed-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20250410-topic-sm8x50-pinctrl-reserved-ranges-v2-1-654488392b9a@linaro.org
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: pinctrl: Add Qualcomm SDM630/660 TLMM driver</title>
<updated>2025-04-11T13:25:51+00:00</updated>
<author>
<name>Alexey Minnekhanov</name>
<email>alexeymin@postmarketos.org</email>
</author>
<published>2025-03-31T15:55:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b4420a0c9ed446a9dbb5439d543d7c74344a5099'/>
<id>b4420a0c9ed446a9dbb5439d543d7c74344a5099</id>
<content type='text'>
Add support for TLMM pin controller block (Top Level Mode
Multiplexer) on SDM630/660 SoCs, with support for special pins.

Correct pin configuration is required for working debug UART
and eMMC/SD cards.

SDM630 and SDM660 TLMM blocks are the same.

Signed-off-by: Alexey Minnekhanov &lt;alexeymin@postmarketos.org&gt;
Reviewed-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
Link: https://lore.kernel.org/r/20250331155531.3638165-1-alexeymin@postmarketos.org
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for TLMM pin controller block (Top Level Mode
Multiplexer) on SDM630/660 SoCs, with support for special pins.

Correct pin configuration is required for working debug UART
and eMMC/SD cards.

SDM630 and SDM660 TLMM blocks are the same.

Signed-off-by: Alexey Minnekhanov &lt;alexeymin@postmarketos.org&gt;
Reviewed-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
Link: https://lore.kernel.org/r/20250331155531.3638165-1-alexeymin@postmarketos.org
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: add driver for SA8775P SoC</title>
<updated>2025-04-10T13:43:09+00:00</updated>
<author>
<name>Varadarajan Narayanan</name>
<email>quic_varada@quicinc.com</email>
</author>
<published>2025-03-24T08:05:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5effb1e62556e5d84c2fc037f7020d26cdf3b9ca'/>
<id>5effb1e62556e5d84c2fc037f7020d26cdf3b9ca</id>
<content type='text'>
Add pinctrl and GPIO driver for SA8775P. Driver code is based on the
similar U-Boot and Linux drivers.

Signed-off-by: Varadarajan Narayanan &lt;quic_varada@quicinc.com&gt;
Reviewed-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
Link: https://lore.kernel.org/r/20250324080504.2385747-1-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add pinctrl and GPIO driver for SA8775P. Driver code is based on the
similar U-Boot and Linux drivers.

Signed-off-by: Varadarajan Narayanan &lt;quic_varada@quicinc.com&gt;
Reviewed-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
Link: https://lore.kernel.org/r/20250324080504.2385747-1-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl/qcom: fix kconfig option names</title>
<updated>2025-03-17T15:12:26+00:00</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2025-03-17T13:25:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=69aab567407efe67b8b2a10a3843656101b402ca'/>
<id>69aab567407efe67b8b2a10a3843656101b402ca</id>
<content type='text'>
A copy-paste error is starting to get out of hand... Fix all these so
they don't look like clock drivers in menuconfig.

Link: https://lore.kernel.org/r/20250317132519.46080-1-caleb.connolly@linaro.org
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
<content type='xhtml'>
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<pre>
A copy-paste error is starting to get out of hand... Fix all these so
they don't look like clock drivers in menuconfig.

Link: https://lore.kernel.org/r/20250317132519.46080-1-caleb.connolly@linaro.org
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: add sc7280 pinctrl driver</title>
<updated>2025-03-17T13:38:18+00:00</updated>
<author>
<name>Caleb Connolly</name>
<email>caleb.connolly@linaro.org</email>
</author>
<published>2025-01-22T15:02:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=51ec7fdb64b3523915a3199826495368e4c5d033'/>
<id>51ec7fdb64b3523915a3199826495368e4c5d033</id>
<content type='text'>
Introduce a pinctrl driver for SC7280/QCM6490, this is used by the RB3
Gen 2, FairPhone 5 and other devices.

Tested-by: Christopher Obbard &lt;christopher.obbard@linaro.org&gt;
Link: https://lore.kernel.org/r/20250122-pinctrl-sc7280-v1-1-8bdba72e6366@linaro.org
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Introduce a pinctrl driver for SC7280/QCM6490, this is used by the RB3
Gen 2, FairPhone 5 and other devices.

Tested-by: Christopher Obbard &lt;christopher.obbard@linaro.org&gt;
Link: https://lore.kernel.org/r/20250122-pinctrl-sc7280-v1-1-8bdba72e6366@linaro.org
Signed-off-by: Caleb Connolly &lt;caleb.connolly@linaro.org&gt;
</pre>
</div>
</content>
</entry>
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