u-boot.git/drivers/pinctrl/renesas/pfc.c, branch main

pinctrl: renesas: Add initial R8A78000 R-Car X5H PFC tables

2025-11-06T19:09:59Z

Add initial pin control tables for the Renesas R-Car X5H R8A78000 SoC. This SoC is the first one which includes custom DRV register handling, different from previous generations due to change in DRV register bit layout. Signed-off-by: Huy Bui Signed-off-by: Khanh Le Signed-off-by: Hai Pham Signed-off-by: Marek Vasut

pinctrl: renesas: Move drive strength configuration into sh_pfc_soc_operations

2025-11-06T19:09:59Z

The upcoming Renesas R-Car Gen5 uses different mapping of bits in DRV control register, which is incompatible with existing DRV register bit mapping. Add .set_drive_strength callback into sh_pfc_soc_operations and call it from sh_pfc_pinconf_set(), to allow each SoC specific PFC driver to implement replacement .set_drive_strength. Make the current sh_pfc_pinconf_set_drive_strength() non-static, rename it with rcar_ prefix, and pass it as .set_drive_strength for existing PFC drivers. This is a preparatory patch for R-Car Gen5, no functional change. Signed-off-by: Hai Pham Signed-off-by: Marek Vasut [Marek: Consistently use .set_drive_strength() and pass exisiting sh_pfc_pinconf_set_drive_strength() as its parameter for all PFC drivers. Rewrite commit message.]

pinctrl: renesas: Show bit position in config write

2025-11-06T19:09:59Z

Show bit position in config write debug log, which is helpful for cases where the p port setting is applied at the exact p bit position. Signed-off-by: Hai Pham Signed-off-by: Marek Vasut # Unsplit the string

pinctrl: renesas: Convert to IS_ENABLED() macro

2024-12-29T15:55:31Z

Use the IS_ENABLED() macro to reduce amount of #ifdef use in the driver and improve code coverage. With IS_ENABLED() macro, the code is compiled and then optimized out, which prevents bitrot. In case no PFC table matches the SoC in use, do not probe the driver and instead exit with -ENODEV. This should never happen under normal conditions, because this would mean the driver DT compatible string match happened, but the list in probe() cannot match the model listed in match data associated with the compatible string on which the match did happen. Signed-off-by: Marek Vasut

drivers: pinctrl: Remove duplicate newlines

2024-07-22T16:53:05Z

Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut

pinctrl: renesas: Add R8A779H0 V4M PFC tables

2024-02-10T16:08:06Z

Add pinctrl tables for R8A779H0 V4M SoC. The current version of these PFC tables is imported and squashed from: https://lore.kernel.org/linux-renesas-soc/cover.1706264667.git.geert+renesas@glider.be/ Signed-off-by: Hai Pham

pinctrl: renesas: Drop include common.h

2024-01-27T19:16:39Z

The header file is not necessary in either of those files, remove it as common.h is going away. Signed-off-by: Marek Vasut Reviewed-by: Paul Barker

pinctrl: renesas: Add support for 1.8V/2.5V I/O voltage levels

2023-09-30T22:08:28Z

Currently, the Renesas pin control driver supports pins that can switch their I/O voltage levels between either 1.8V and 3.3V, or between 2.5V and 3.3V. However, some SoCs have pins that can switch between 1.8V and 2.5V. Add support for this by replacing the separate SH_PFC_PIN_CFG_IO_VOLTAGE capability and voltage level flags by a 2-bit field, to cover three possible I/O voltage switching options. Ported from Linux kernel commit by Geert Uytterhoeven: b88e733ac517 ("pinctrl: renesas: Add support for 1.8V/2.5V I/O voltage levels") Signed-off-by: Geert Uytterhoeven Signed-off-by: Marek Vasut

pinctrl: renesas: Add R8A779G0 V4H PFC tables

2023-04-07T15:13:28Z

Add pinctrl tables for R8A779G0 V4H SoC. Based on Linux next 20230228 PFC tables tables up to commit 058f4df42121 ("Add linux-next specific files for 20230228") Reviewed-by: Marek Vasut Signed-off-by: LUU HOAI Signed-off-by: Hai Pham Signed-off-by: Takeshi Kihara Signed-off-by: Phong Hoang Signed-off-by: Marek Vasut [Marek: Sync with Linux next 20230228, sort sh_pfc_pinconf_set voltage args]

pinctrl: renesas: Add R8A779F0 S4 PFC tables

2023-04-07T15:13:28Z

Add pinctrl tables for R8A779F0 S4 SoC. Based on Linux next 20230228 PFC tables tables up to commit 058f4df42121 ("Add linux-next specific files for 20230228") Reviewed-by: Marek Vasut Signed-off-by: LUU HOAI Signed-off-by: Hai Pham Signed-off-by: Marek Vasut [Marek: Use RCAR_64 Kconfig, sync with Linux next 20230228]