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<title>u-boot.git/drivers/pinctrl/rockchip, branch v2024.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl/rockchip?h=v2024.01</id>
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<updated>2023-08-14T03:07:27Z</updated>
<entry>
<title>pinctrl: rockchip: Fix drive and input schmitt on RK3568</title>
<updated>2023-08-14T03:07:27Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2023-08-14T00:28:26Z</published>
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<id>urn:sha1:d7009faa098169abd7ff0e4b41af89b17896a7da</id>
<content type='text'>
On RK3568 most pins have a configurable drive strength of level 0-5 and
some pins level 0-11. When rk3568_set_drive is called with a strength
value above 7 the drv value written to reg may overflow into the write
enable bits, resulting in a bad configuration.

This cause e.g. ethernet PHY on Radxa CM3-IO board not to work after
drive is configured according to the device tree.

  Could not get PHY for ethernet@fe010000: addr 0

Level 6-11 can be configured using a second reg for some pins, however
the drv value is reused resulting in lower 6 bits being written to reg.

Input schmitt is configured in 2-bit fields on RK3568 compared to
earlier generation and 2'b10 should be used to enable input schmitt.

Change to use regmap_update_bits with a rmask to fix the overflow issue
and closer match the linux driver. Bit shift the drv value used for the
second reg to configure drive strength level 6-11. Also write correct
values for input schmitt setting.

Fixes: 1977d746aa54 ("rockchip: rk3568: add rk3568 pinctrl driver")
Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: rockchip: Fix Data Abort exception in SPL</title>
<updated>2023-06-29T10:42:58Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2023-06-08T10:59:38Z</published>
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<id>urn:sha1:63348d61a878187a368c0638833efbaf76fc89f9</id>
<content type='text'>
Using CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y and CONFIG_OF_LIVE=y triggers
a Data Abort exception from unaligned memory access when the pinctrl
driver iterate node properties, e.g. for UART2 on RK3568.

  setting mux of GPIO0-24 to 1
  setting mux of GPIO0-24 to 1
  "Synchronous Abort" handler, esr 0x96000021
  elr: 000000000000e554 lr : 000000000000e54c
  x 0: 0000000000000a5c x 1: 0000000000000a5c
  x 2: 0000000000000007 x 3: 0000000000000065
  x 4: 0000000000000007 x 5: 0000000000022d4e
  x 6: 0000000000000a7c x 7: 00000000000227a4
  x 8: 0000000000021cf0 x 9: 0000000000000a7c
  x10: 0000000000021cf0 x11: 0000000000021cf0
  x12: 00000000003fda1c x13: 0000000000000007
  x14: 00000000003fd9ec x15: 000000000001c0ff
  x16: 0000000007000000 x17: 00000000fdccd028
  x18: 00000000003fde20 x19: 0000000000000018
  x20: 0000000000020670 x21: 0000000000000000
  x22: 00000000003fdb00 x23: 00000000003fef90
  x24: 0000000000020688 x25: 0000000000000000
  x26: 0000000000000001 x27: 00000000003ffc50
  x28: 0000000000000000 x29: 00000000003fda60

  Code: b94083e1 97ffd508 93407c01 37f81260 (f9401038)
  Resetting CPU ...

Fix this by replacing the loop to access node properties with use of
ofnode_for_each_prop instead of the current ifdef.

Also continue to next prop instead of aborting at first sign of an
unknown property.

This fixes the Data Abort exception and also pinconf of e.g. pull and
drive in SPL, e.g. for UART2 on RK3568.

  setting mux of GPIO0-24 to 1
  setting mux of GPIO0-24 to 1
  setting pull of GPIO0-24 to 5
  setting mux of GPIO0-25 to 1
  setting mux of GPIO0-25 to 1
  setting pull of GPIO0-25 to 5

Fixes: e7ae4cf27a6d ("pinctrl: rockchip: Add common rockchip pinctrl driver")
Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: rockchip: Fix IO mux selection on RK3568</title>
<updated>2023-04-21T07:16:01Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2023-04-17T19:07:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=518fa3441e1f04806e6151baae4dd4c694a46948'/>
<id>urn:sha1:518fa3441e1f04806e6151baae4dd4c694a46948</id>
<content type='text'>
IO mux selection is not working correctly for all pins. Sync mux route
data from linux to add any missing and update wrong trigger pins to fix
this. Also apply the pull-up fix needed for GPIO0 D3-D6.

Fixes: 1977d746aa54 ("rockchip: rk3568: add rk3568 pinctrl driver")
Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
</content>
</entry>
<entry>
<title>pinctrl: rockchip: support rk3588 pinctrl</title>
<updated>2023-04-21T07:16:00Z</updated>
<author>
<name>Jianqun Xu</name>
<email>jay.xu@rock-chips.com</email>
</author>
<published>2023-03-15T15:32:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4f51064533ff8f27d2859a4ad0c4c367ec28e712'/>
<id>urn:sha1:4f51064533ff8f27d2859a4ad0c4c367ec28e712</id>
<content type='text'>
Add support for Rockchip rk3588 variant of pinctrl.

The driver is adapted from the Linux driver.

Signed-off-by: Jianqun Xu &lt;jay.xu@rock-chips.com&gt;
[eugen.hristev@collabora.com:
port to latest U-boot, bring more changes from Linux
use translated pull values table]
Signed-off-by: Eugen Hristev &lt;eugen.hristev@collabora.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Tested-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3568: add rk3568 pinctrl driver</title>
<updated>2023-02-28T10:07:27Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@edgeble.ai</email>
</author>
<published>2023-02-17T11:58:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1977d746aa54ae197a9d5f24414680d3ca321fb1'/>
<id>urn:sha1:1977d746aa54ae197a9d5f24414680d3ca321fb1</id>
<content type='text'>
Add driver supporting pin multiplexing on rk3568 platform.

Co-developed-by: Manoj Sai &lt;abbaraju.manojsai@amarulasolutions.com&gt;
Signed-off-by: Manoj Sai &lt;abbaraju.manojsai@amarulasolutions.com&gt;
Co-developed-by: Jianqun Xu &lt;jay.xu@rock-chips.com&gt;
Signed-off-by: Jianqun Xu &lt;jay.xu@rock-chips.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@edgeble.ai&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: rockchip: Add rv1126 support</title>
<updated>2023-01-16T10:01:11Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@edgeble.ai</email>
</author>
<published>2022-12-14T17:50:57Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8430a8750209a15b2ef6ca0388d92ea30ff5bca2'/>
<id>urn:sha1:8430a8750209a15b2ef6ca0388d92ea30ff5bca2</id>
<content type='text'>
Add pinctrl driver for Rockchip RV1126.

Signed-off-by: Jianqun Xu &lt;jay.xu@rock-chips.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@edgeble.ai&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: rockchip: Add pinctrl route types</title>
<updated>2023-01-16T10:01:11Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@edgeble.ai</email>
</author>
<published>2022-12-14T17:50:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=32b2ea9818c6157bfc077de487b78e78536ab4a8'/>
<id>urn:sha1:32b2ea9818c6157bfc077de487b78e78536ab4a8</id>
<content type='text'>
Some pins in rockchip are routed via Top GRF and PMU GRF
instead of direct regmap.

Add support to handle all these routing paths so that the
SoC pinctrl drivers will use them accordingly.

Signed-off-by: Jianqun Xu &lt;jay.xu@rock-chips.com&gt;
Signed-off-by: Jagan Teki &lt;jagan@edgeble.ai&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3066: add rk3066 pinctrl driver</title>
<updated>2022-04-18T03:25:13Z</updated>
<author>
<name>Paweł Jarosz</name>
<email>paweljarosz3691@gmail.com</email>
</author>
<published>2022-04-16T15:09:40Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=086863c9829ed17e3a7d0425c63fd2898d6c04a5'/>
<id>urn:sha1:086863c9829ed17e3a7d0425c63fd2898d6c04a5</id>
<content type='text'>
Add driver supporting pin multiplexing on rk3066 platform.

Signed-off-by: Paweł Jarosz &lt;paweljarosz3691@gmail.com&gt;
Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>treewide: Use OF_REAL instead of !OF_PLATDATA</title>
<updated>2021-09-25T15:46:15Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-08-07T13:24:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=95397385091da9d0d3acd7e69199ae23114ac22c'/>
<id>urn:sha1:95397385091da9d0d3acd7e69199ae23114ac22c</id>
<content type='text'>
Now that we have a 'positive' Kconfig option, use this instead of the
negative one, which is harder to understand.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>common: Drop asm/global_data.h from common header</title>
<updated>2021-02-02T20:33:42Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-10-31T03:38:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=401d1c4f5d2d29c4bc4beaec95402ca23eb63295'/>
<id>urn:sha1:401d1c4f5d2d29c4bc4beaec95402ca23eb63295</id>
<content type='text'>
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include &lt;asm/global_data.h&gt; at all, so
remove that include.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
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