The U_BOOT_DRIVER macro creates a list of drivers used at link time, and all entries here must be unique. This in turn means that all entries in the code should also be unique in order to not lead to build failures later with unexpected build combinations. Typically, the problem we have here is when a driver is obviously based on another driver and didn't update this particular field and so while the name field reflects something unique the linker entry itself is not. In a few places this provides a more suitable string name as well, however. Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # Tegra Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Heiko Schocher <hs@nabladev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
A few pinctrl drivers cannot build without access to some platform specific header files. Express those requirements in Kconfig as well. Signed-off-by: Tom Rini <trini@konsulko.com>
UART-A can be exposed through uSD, this was tested on Transformer T20 but should work on all Ventana-based boards. TX is exported on SDD pingroup corresponding to uSD CLK pin RX is exported on SDB which is CMD pin in uSD slot Signed-off-by: Artur Kowalski <arturkow2000@gmail.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Applies same logic to general Tegra pincontrol driver as is done to Tegra20
by commit:
a35bf832d70 ("pinctrl: tegra20: detect unknown/invalid pin/func
configurations")
Suggested-by: Artur Kowalski <arturkow2000@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Tegra20 driver doesn't know about some pin configurations and even about some pins. In case when pin configuration is unknown the pin would be muxed to whatever is under function 0, in case when pin itself is unknown, it could cause out-of-bounds array access in pinmux_set_func and pinmux_set_pullupdown. Signed-off-by: Artur Kowalski <arturkow2000@gmail.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The current default pin and drive values were more of temporary placeholders. They have to be replaced with accurate default values as specified in the TRM and header file. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Tegra 124 is fully compatible with existing Tegra pincontrol driver, but it needs a specific MIPI PAD control pinconfig. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Pin detection on t20 depends on node name. With recent changes in node naming, let's remove '_' to be safe about both '_' or '-' use. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes, resolve some whitespace issues and fix the name of the new apalis-tk1 env file by Tom. Signed-off-by: Tom Rini <trini@konsulko.com>
Tegra 3 has UART-E exposable via SD card slot which may be handy for debugging. This change only adds funcmux part, to use UART-E on the device you additionally would need: - set stdout-path to serial@70006400 (uarte) - configure sdmmc1_dat3_py4 and sdmmc1_dat2_py5 pinmux for uarte - disable or remove sdhci@7800000 node - enable CONFIG_TEGRA_ENABLE_UARTE in defconfig - set CFG_SYS_NS16550_COM to NV_PA_APB_UARTE_BASE in device header Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>