u-boot.git/drivers/pinctrl/tegra, branch next Unnamed repository; edit this file 'description' to name the repository. pinctrl: Tighten some pinctrl driver dependencies 2025-08-14T16:58:48+00:00 Tom Rini trini@konsulko.com 2025-08-04T21:52:53+00:00 e7a95ee2b575d7f0f44da3b3aeb951508eac1511 A few pinctrl drivers cannot build without access to some platform specific header files. Express those requirements in Kconfig as well. Signed-off-by: Tom Rini <trini@konsulko.com> 
A few pinctrl drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
ARM: tegra20: add funcmux for exposing UART over uSD slot on Tegra 20 2025-04-12T08:12:06+00:00 Artur Kowalski arturkow2000@gmail.com 2025-03-30T19:26:39+00:00 427dd4dd27eef00306a94800d66a6b82e2b11ad8 UART-A can be exposed through uSD, this was tested on Transformer T20 but should work on all Ventana-based boards. TX is exported on SDD pingroup corresponding to uSD CLK pin RX is exported on SDB which is CMD pin in uSD slot Signed-off-by: Artur Kowalski <arturkow2000@gmail.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> 
UART-A can be exposed through uSD, this was tested on Transformer T20
but should work on all Ventana-based boards.

TX is exported on SDD pingroup corresponding to uSD CLK pin
RX is exported on SDB which is CMD pin in uSD slot

Signed-off-by: Artur Kowalski <arturkow2000@gmail.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
pinctrl: tegra: detect unknown/invalid pin/func configurations 2025-04-12T06:48:01+00:00 Svyatoslav Ryhel clamor95@gmail.com 2025-03-31T08:28:53+00:00 e9245a360ac6eb12ee08138de13aeddc34a8d30a Applies same logic to general Tegra pincontrol driver as is done to Tegra20 by commit: a35bf832d70 ("pinctrl: tegra20: detect unknown/invalid pin/func configurations") Suggested-by: Artur Kowalski <arturkow2000@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> 
Applies same logic to general Tegra pincontrol driver as is done to Tegra20
by commit:

a35bf832d70 ("pinctrl: tegra20: detect unknown/invalid pin/func
configurations")

Suggested-by: Artur Kowalski <arturkow2000@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
pinctrl: tegra20: detect unknown/invalid pin/func configurations 2025-04-12T06:47:42+00:00 Artur Kowalski arturkow2000@gmail.com 2025-03-30T19:11:54+00:00 a35bf832d7047662761571b6f80861cb25477030 Tegra20 driver doesn't know about some pin configurations and even about some pins. In case when pin configuration is unknown the pin would be muxed to whatever is under function 0, in case when pin itself is unknown, it could cause out-of-bounds array access in pinmux_set_func and pinmux_set_pullupdown. Signed-off-by: Artur Kowalski <arturkow2000@gmail.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> 
Tegra20 driver doesn't know about some pin configurations and even about
some pins. In case when pin configuration is unknown the pin would be
muxed to whatever is under function 0, in case when pin itself is
unknown, it could cause out-of-bounds array access in pinmux_set_func
and pinmux_set_pullupdown.

Signed-off-by: Artur Kowalski <arturkow2000@gmail.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
pinctrl: tegra: adjust default values of pins 2025-03-19T08:59:24+00:00 Svyatoslav Ryhel clamor95@gmail.com 2025-03-13T08:48:06+00:00 59bc30822177de6b79851b8bc1da4b8283273509 The current default pin and drive values were more of temporary placeholders. They have to be replaced with accurate default values as specified in the TRM and header file. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> 
The current default pin and drive values were more of temporary
placeholders. They have to be replaced with accurate default values as
specified in the TRM and header file.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
pinctrl: tegra: add Tegra K1 support 2025-02-26T11:08:19+00:00 Svyatoslav Ryhel clamor95@gmail.com 2024-11-21T12:43:00+00:00 a237a209933de579dc16e768502850fee486fda6 Tegra 124 is fully compatible with existing Tegra pincontrol driver, but it needs a specific MIPI PAD control pinconfig. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> 
Tegra 124 is fully compatible with existing Tegra pincontrol
driver, but it needs a specific MIPI PAD control pinconfig.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
pinctrl: tegra20: adjust pin type detection 2025-02-12T08:35:17+00:00 Svyatoslav Ryhel clamor95@gmail.com 2024-12-06T15:50:58+00:00 efb7964cc1613bed0550510116f11fe757c025f8 Pin detection on t20 depends on node name. With recent changes in node naming, let's remove '_' to be safe about both '_' or '-' use. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> 
Pin detection on t20 depends on node name. With recent changes
in node naming, let's remove '_' to be safe about both '_' or
'-' use.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra 2024-10-13T16:43:24+00:00 Tom Rini trini@konsulko.com 2024-10-13T16:19:05+00:00 82686e678e1587ddbd9570f82c58cdc3aecf2dbe Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes, resolve some whitespace issues and fix the name of the new apalis-tk1 env file by Tom. Signed-off-by: Tom Rini <trini@konsulko.com> 
Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes,
resolve some whitespace issues and fix the name of the new apalis-tk1
env file by Tom.

Signed-off-by: Tom Rini <trini@konsulko.com>
Tegra30: Add funcmux for UART over SD slot 2024-10-13T14:20:26+00:00 Jonas Schwöbel jonasschwoebel@yahoo.de 2024-01-22T12:40:27+00:00 b515d7ae0de51a26f73b2ddb5ea4db0d95b67d7a Tegra 3 has UART-E exposable via SD card slot which may be handy for debugging. This change only adds funcmux part, to use UART-E on the device you additionally would need: - set stdout-path to serial@70006400 (uarte) - configure sdmmc1_dat3_py4 and sdmmc1_dat2_py5 pinmux for uarte - disable or remove sdhci@7800000 node - enable CONFIG_TEGRA_ENABLE_UARTE in defconfig - set CFG_SYS_NS16550_COM to NV_PA_APB_UARTE_BASE in device header Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> 
Tegra 3 has UART-E exposable via SD card slot which may be
handy for debugging. This change only adds funcmux part, to
use UART-E on the device you additionally would need:
- set stdout-path to serial@70006400 (uarte)
- configure sdmmc1_dat3_py4 and sdmmc1_dat2_py5 pinmux for
  uarte
- disable or remove sdhci@7800000 node
- enable CONFIG_TEGRA_ENABLE_UARTE in defconfig
- set CFG_SYS_NS16550_COM to NV_PA_APB_UARTE_BASE in device
  header

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD 2024-10-11T17:44:48+00:00 Simon Glass sjg@chromium.org 2024-09-30T01:49:48+00:00 371dc068bbf50c6ed6146c04ec83b644bcc79249 Use the new symbol to refer to any 'SPL' build, including TPL and VPL Signed-off-by: Simon Glass <sjg@chromium.org> 
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>