<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/pinctrl/uniphier, branch v2016.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl/uniphier?h=v2016.07</id>
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<updated>2016-07-01T20:44:30Z</updated>
<entry>
<title>pinctrl: uniphier: add Ethernet pin-mux settings</title>
<updated>2016-07-01T20:44:30Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-06-29T10:39:01Z</published>
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<id>urn:sha1:fc9da85c6059fa204498c55c61b7dfa2ebf7fff8</id>
<content type='text'>
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: uniphier: avoid building unneeded pin-mux tables for SPL</title>
<updated>2016-07-01T20:44:30Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-06-29T10:39:00Z</published>
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<id>urn:sha1:64c1cc4cc5f72f480787bf493a5ebb0696d68bc0</id>
<content type='text'>
SPL does not use all of the devices, so we can save some memory
footprint.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: uniphier: support pin configuration for dedicated pins</title>
<updated>2016-07-01T20:44:29Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-06-29T10:38:59Z</published>
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<id>urn:sha1:5e25b9d5d90205ce9531677e362e9dd9359963b3</id>
<content type='text'>
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.

Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function.  The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.

[ Linux commit: 363c90e743b50a432a91a211dd8b078d9df446e9 ]

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: uniphier: split pinctrl driver for PH1-LD11 and PH1-LD20</title>
<updated>2016-07-01T20:44:29Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-06-29T10:38:58Z</published>
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<id>urn:sha1:3379987e26956d9eab668a0811a0f0a9a056754f</id>
<content type='text'>
PH1-LD11 and PH1-LD20 have much pin controlling in common, so I
added a single driver shared between them in the initial commit.

However, the Ethernet pin-mux settings I am going to add are
different with each other, and they may diverge more as the
progress of development.  Split it into two dedicated drivers.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: uniphier: allow to have pinctrl node under syscon node</title>
<updated>2016-07-01T20:44:29Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-06-29T10:38:57Z</published>
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<id>urn:sha1:186c133444152005473955f1feea2e3184740dd6</id>
<content type='text'>
Currently, the UniPhier pinctrl driver itself is a syscon, but it
turned out much more reasonable to make it a child node of a syscon
because our syscon node consists of a bunch of system configuration
registers, not only pinctrl, but also phy, and misc registers.
It is difficult to split the node.  This commit allows to migrate to
the new DT structure.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: uniphier: remove unneeded pin group nand_cs1</title>
<updated>2016-06-30T14:49:26Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-06-29T10:38:55Z</published>
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<id>urn:sha1:aac641bcf43207feeca5335f5b98d955fe84c257</id>
<content type='text'>
This SoC does not support NAND CS1.  This place-holder is no longer
necessary.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: uniphier: fix NAND pin-mux setting for PH1-LD11/LD20</title>
<updated>2016-06-30T14:49:26Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-06-29T10:38:54Z</published>
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<id>urn:sha1:69da34c073ec7cda928e6cc09fe9cb6abdb3eccd</id>
<content type='text'>
My mistake in the initial support patch.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: uniphier: remove wrong pin-mux functions for ProXstream2</title>
<updated>2016-06-30T14:49:26Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-06-29T10:38:53Z</published>
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<id>urn:sha1:4d1065c8d8d9a6b238cbf7151fc11d0bc1e5cd1b</id>
<content type='text'>
These are pin group names, not function names.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: uniphier: fix NAND and SD pin-mux settings for PH1-LD11/LD20</title>
<updated>2016-04-24T00:53:54Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-04-21T05:43:11Z</published>
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<id>urn:sha1:740314326dd49888647bf84ed44106faf2f161cd</id>
<content type='text'>
I found many mistakes in the initial version.

Fixes: 8a3328c209d0 ("pinctrl: uniphier: support UniPhier PH1-LD20 pinctrl driver")
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: uniphier: rename function/array names</title>
<updated>2016-04-24T00:53:54Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-04-21T05:43:10Z</published>
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<id>urn:sha1:ac13ce49a4cb9e7629d6c151b754bb15b2ba33da</id>
<content type='text'>
Make function/array names match the file names for consistency.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
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