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<title>u-boot.git/drivers/pinctrl, branch v2017.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>pinctrl: a3700: Fix the issue that gpio controller is registered with wrong node id</title>
<updated>2017-06-23T05:09:40+00:00</updated>
<author>
<name>Ken Ma</name>
<email>make@marvell.com</email>
</author>
<published>2017-06-22T09:13:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ae118b6855a7d003a7d024129e686c8a4a400141'/>
<id>ae118b6855a7d003a7d024129e686c8a4a400141</id>
<content type='text'>
In armada_37xx_gpiochip_register, the return value of fdtdec_get_bool
should be true when gpio-controller is found; current codes makes a
wrong inverse return value judgement, this patch fixes it.

Signed-off-by: Ken Ma &lt;make@marvell.com&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Kostya Porotchkin &lt;kostap@marvell.com&gt;
Cc: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Cc: Nadav Haklai &lt;nadavh@marvell.com&gt;
Cc: Wilson Ding &lt;dingwei@marvell.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
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<pre>
In armada_37xx_gpiochip_register, the return value of fdtdec_get_bool
should be true when gpio-controller is found; current codes makes a
wrong inverse return value judgement, this patch fixes it.

Signed-off-by: Ken Ma &lt;make@marvell.com&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Kostya Porotchkin &lt;kostap@marvell.com&gt;
Cc: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Cc: Nadav Haklai &lt;nadavh@marvell.com&gt;
Cc: Wilson Ding &lt;dingwei@marvell.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: a3700: Fix uart2 group selection register mask</title>
<updated>2017-06-23T05:09:40+00:00</updated>
<author>
<name>Ken Ma</name>
<email>make@marvell.com</email>
</author>
<published>2017-06-22T09:13:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b5a6c94a0380071600dc5b8be1853164f62af146'/>
<id>b5a6c94a0380071600dc5b8be1853164f62af146</id>
<content type='text'>
If north bridge selection register bit1 is clear, pins [10:8] are for
SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for
GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn
and CTSn, so bit1 should be added to uart2 group and it must be set
for both "gpio" and "uart" functions of uart2 group.

Signed-off-by: Ken Ma &lt;make@marvell.com&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Kostya Porotchkin &lt;kostap@marvell.com&gt;
Cc: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Cc: Nadav Haklai &lt;nadavh@marvell.com&gt;
Cc: Wilson Ding &lt;dingwei@marvell.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
<content type='xhtml'>
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<pre>
If north bridge selection register bit1 is clear, pins [10:8] are for
SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for
GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn
and CTSn, so bit1 should be added to uart2 group and it must be set
for both "gpio" and "uart" functions of uart2 group.

Signed-off-by: Ken Ma &lt;make@marvell.com&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Kostya Porotchkin &lt;kostap@marvell.com&gt;
Cc: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Cc: Nadav Haklai &lt;nadavh@marvell.com&gt;
Cc: Wilson Ding &lt;dingwei@marvell.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>stm32: stm32f7: add spl build support</title>
<updated>2017-06-09T15:23:55+00:00</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2017-05-28T19:55:10+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b97476965bf292c13074e01de4bd39253de0ef66'/>
<id>b97476965bf292c13074e01de4bd39253de0ef66</id>
<content type='text'>
This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram &amp; then jumps to entry point.

Here are the flash memory addresses for U-Boot-spl &amp; standard U-Boot:
	- spl U-Boot		: 0x0800_0000
	- standard U-Boot	: 0x0800_8000

To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
[trini: Rework Kconfig logic a bit]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
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<pre>
This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram &amp; then jumps to entry point.

Here are the flash memory addresses for U-Boot-spl &amp; standard U-Boot:
	- spl U-Boot		: 0x0800_0000
	- standard U-Boot	: 0x0800_8000

To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
[trini: Rework Kconfig logic a bit]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: pinctrl: Add rv1108 pinctrl driver</title>
<updated>2017-06-07T13:29:24+00:00</updated>
<author>
<name>Andy Yan</name>
<email>andy.yan@rock-chips.com</email>
</author>
<published>2017-06-01T10:00:10+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=09aa7c468cd3f93c2eb9286bbdb163c914d3c2ae'/>
<id>09aa7c468cd3f93c2eb9286bbdb163c914d3c2ae</id>
<content type='text'>
Add pinctrl support for Rockchip rv1108 soc

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add pinctrl support for Rockchip rv1108 soc

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: pinctrl: rk3328: do not set io routing</title>
<updated>2017-06-07T13:29:21+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-05-17T03:44:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=077eb3151442462cae020ab7254cc3e73407e5c8'/>
<id>077eb3151442462cae020ab7254cc3e73407e5c8</id>
<content type='text'>
In rk3328, some function pin may have more than one choice, and muxed
with more than one IO, for example, the UART2 controller IO,
TX and RX, have 3 choice(setting in com_iomux):
- M0 which mux with GPIO1A0/GPIO1A1
- M1 which mux with GPIO2A0/GPIO2A1
- usb2phy which mux with USB2.0 DP/DM pin.

We should not decide which group to use in pinctrl driver,
for it may be different in different board, it should goes to board
file, and the pinctrl file should setting correct iomux depends on
the com_iomux value.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In rk3328, some function pin may have more than one choice, and muxed
with more than one IO, for example, the UART2 controller IO,
TX and RX, have 3 choice(setting in com_iomux):
- M0 which mux with GPIO1A0/GPIO1A1
- M1 which mux with GPIO2A0/GPIO2A1
- usb2phy which mux with USB2.0 DP/DM pin.

We should not decide which group to use in pinctrl driver,
for it may be different in different board, it should goes to board
file, and the pinctrl file should setting correct iomux depends on
the com_iomux value.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: pinctrl: move rk3328 grf reg definition in header file</title>
<updated>2017-06-07T13:29:21+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-05-17T03:44:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6f0c12371302b375c0fe87c0bcb5b19de03e9d38'/>
<id>6f0c12371302b375c0fe87c0bcb5b19de03e9d38</id>
<content type='text'>
Move GRF register bit definition into GRF header file, remove
'GRF_' prefix and add 'GPIOmXn_' as prefix for bit meaning.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move GRF register bit definition into GRF header file, remove
'GRF_' prefix and add 'GPIOmXn_' as prefix for bit meaning.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rk3036: clean mask definition for grf reg</title>
<updated>2017-06-07T13:29:21+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-05-15T12:52:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3c421f6fa983dabe8e8c77583cea44f5b35368dd'/>
<id>3c421f6fa983dabe8e8c77583cea44f5b35368dd</id>
<content type='text'>
U-Boot prefer to use MASKs with SHIFT embeded, clean the Macro
definition in grf header file and pinctrl driver.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
U-Boot prefer to use MASKs with SHIFT embeded, clean the Macro
definition in grf header file and pinctrl driver.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rk3368: Add pinctrl driver</title>
<updated>2017-06-07T13:29:19+00:00</updated>
<author>
<name>Andy Yan</name>
<email>andy.yan@rock-chips.com</email>
</author>
<published>2017-05-15T09:50:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=27600a583725ed0fa9cd4755a86ed0051bfb8c67'/>
<id>27600a583725ed0fa9cd4755a86ed0051bfb8c67</id>
<content type='text'>
Add driver to support iomux setup for the most commonly
used peripherals on rk3368.

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add driver to support iomux setup for the most commonly
used peripherals on rk3368.

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: core: Update device_bind_driver_to_node() to use ofnode</title>
<updated>2017-06-01T13:03:08+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-05-19T02:09:07+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=45a26867e8158d0338ba5b99d21989a72d423209'/>
<id>45a26867e8158d0338ba5b99d21989a72d423209</id>
<content type='text'>
Adjust this function to us an ofnode instead of an offset, so it can be
used with livetree. This involves updating all callers.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
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<pre>
Adjust this function to us an ofnode instead of an offset, so it can be
used with livetree. This involves updating all callers.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: core: Replace of_offset with accessor (part 2)</title>
<updated>2017-06-01T13:03:04+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-05-17T23:18:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=da409ccc4ae62a0bf7111e2f4419fdbfd1ba3d89'/>
<id>da409ccc4ae62a0bf7111e2f4419fdbfd1ba3d89</id>
<content type='text'>
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
