u-boot.git/drivers/pinctrl, branch v2017.09-rc2

rockchip: pinctrl: rk3368: add SPI support

2017-08-13T15:12:25+00:00

To implement pinctrl support for the RK3368, we need to add the
bit-definitions to configure the IOMUX and tie these into the
pinctrl framework. This also adds the mapping from the IRQ# back
onto the periheral id for the SPI devices.

Signed-off-by: Philipp Tomsich 
Reviewed-by: Simon Glass

rockchip: pinctrl: rk3368: move IOMUX bit-definitions to pinctrl driver

2017-08-13T15:12:24+00:00

There is no real reason to keep the bit-definitions for the IOMUX in
the grf header file (which defines the register layout of the GRF block):
these should only be used by our pinctrl driver (with the possible
exception of early debug-init code in TPL/SPL).

This moves the relevant definitions from the grf_rk3368.h header
into the pinctrl driver pinctrl_rk3368.c.

Signed-off-by: Philipp Tomsich 
Reviewed-by: Simon Glass

rockchip: pinctrl: rk3368: add support for configuring the MMC pins

2017-08-13T15:12:23+00:00

The RK3368 has two SD/MMC controllers that can be used from U-Boot
both during SPL and for booting an OS from the full bootloader stage.
While both are configured to (mostly) sensible settings from the BROM,
additional configuration for the MMC controller is needed to configure
it to 8bit mode.

This adds pinctrl support for the MMC controller.

Signed-off-by: Philipp Tomsich 
Reviewed-by: Simon Glass

rockchip: pinctrl: rk3368: add GMAC (RGMII only) support

2017-08-13T15:12:23+00:00

To add GMAC (Gigabit Ethernet) support (limited to RGMII only at this
point), we need support for additional pin-configuration.  This commit
adds the pinctrl support for GMAC in RGMII mode:
 * adds a PERIPH_ID_GMAC and the mapping from IRQ number to PERIPH_ID
 * configures the RGMII pins

Signed-off-by: Philipp Tomsich 
Reviewed-by: Simon Glass

rockchip: rk3368: grf: use shifted-constants

2017-08-13T15:12:23+00:00

The RK3368 GRF header was still defines with a shifted-mask but with
non-shifted function selectors for the IOMUX defines.  As the RK3368
support is still fresh enough to allow a quick change, we do this now
before having more code use this.

Signed-off-by: Philipp Tomsich

dm: Kconfig: fix typo in help for SPL_PINCTRL

2017-07-31T15:22:53+00:00

Changes 'controlloers' to 'controllers' in the help-text for
SPL_PINCTRL.

Signed-off-by: Philipp Tomsich

rockchip: rk3288: Add support for drive-strength in PINCTRL

2017-07-27T12:59:02+00:00

Currently, drive-strenght to 12ma are described and supposed to be used
on RK3288. However, the pinctrl driver for this SoC only handles muxing
and pull up/pull down via PU/PD control registers. So complex IPs like
GMAC are working in normal ethernet 100mbps, but not at 1gbps typically.

This commit adds support for handling drive-strength of 12ma, when it's
defined in the DT.

Signed-off-by: Romain Perier 
Acked-by: Philipp Tomsich 
Reviewed-by: Philipp Tomsich

rockchip: rk3288: Revert MAC_TXCLK in pinctrl for GMAC

2017-07-27T12:59:01+00:00

This reverts TXCLK toggling that was accidently dropped while reworking
commit 2454b719fb87 ("rockchip: rk3288: Add pinctrl support for the gmac
ethernet interface"). So the TX clock is enabled and we can use
GMAC_ROCKCHIP in 1Gbps when basic PINCTRL support is enabled
(!PINTRL_FULL).

Fixes: 2454b719fb87 ("rockchip: rk3288: Add pinctrl support for the...")
Signed-off-by: Romain Perier 
Acked-by: Philipp Tomsich 
Reviewed-by: Philipp Tomsich

rockchip: rk3288: Remove phy reset GPIO pull up

2017-07-27T12:59:01+00:00

We should not handle this pin explicitly from pinctrl. GMAC driver takes
care of it by using a "reset-gpio" in the DT.

This commit removes pull up for GPIO4B0.

Fixes: 2454b719fb87 ("rockchip: rk3288: Add pinctrl support for the...")
Signed-off-by: Romain Perier 
Acked-by: Philipp Tomsich 
Reviewed-by: Philipp Tomsich

Merge git://git.denx.de/u-boot-uniphier

2017-07-26T15:29:25+00:00