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<title>u-boot.git/drivers/pinctrl, branch v2018.11-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>pinctrl: sandbox: add gpio onewire w1 group</title>
<updated>2018-09-29T00:22:37+00:00</updated>
<author>
<name>Eugen Hristev</name>
<email>eugen.hristev@microchip.com</email>
</author>
<published>2018-09-18T07:35:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0523a6c6f7cc111063d9cb6508550dd83b2224d8'/>
<id>0523a6c6f7cc111063d9cb6508550dd83b2224d8</id>
<content type='text'>
Add onewire "w1" groups and pin function for onewire GPIOs in sandbox.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</content>
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<pre>
Add onewire "w1" groups and pin function for onewire GPIOs in sandbox.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: bcm6838: add pinctrl support</title>
<updated>2018-09-22T18:49:59+00:00</updated>
<author>
<name>Philippe Reynes</name>
<email>philippe.reynes@softathome.com</email>
</author>
<published>2018-08-13T12:23:07+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b3f8e88f3c07f6c72db55faffaaa25990d316c6f'/>
<id>b3f8e88f3c07f6c72db55faffaaa25990d316c6f</id>
<content type='text'>
Add pinctrl support for broadcom bcm6838 SoC.

Signed-off-by: Philippe Reynes &lt;philippe.reynes@softathome.com&gt;
</content>
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<pre>
Add pinctrl support for broadcom bcm6838 SoC.

Signed-off-by: Philippe Reynes &lt;philippe.reynes@softathome.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: Fix build warning with ARM64</title>
<updated>2018-09-11T00:48:20+00:00</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2018-08-16T13:11:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5a07cf5e7ae8cfe1266ef4fc445c947cb649a081'/>
<id>5a07cf5e7ae8cfe1266ef4fc445c947cb649a081</id>
<content type='text'>
Following build warning appears when pinctrl-single is built for ARM64:

In file included from drivers/pinctrl/pinctrl-single.c:10:0:
drivers/pinctrl/pinctrl-single.c: In function ‘single_configure_pins’:
./arch/arm/include/asm/io.h:43:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
 #define __arch_getw(a)   (*(volatile unsigned short *)(a))

Fix this by using phys_addr_t for variable reg instead of u32

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
</content>
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<pre>
Following build warning appears when pinctrl-single is built for ARM64:

In file included from drivers/pinctrl/pinctrl-single.c:10:0:
drivers/pinctrl/pinctrl-single.c: In function ‘single_configure_pins’:
./arch/arm/include/asm/io.h:43:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
 #define __arch_getw(a)   (*(volatile unsigned short *)(a))

Fix this by using phys_addr_t for variable reg instead of u32

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: Fix register usage in sh_pfc_{read,write}</title>
<updated>2018-06-19T04:15:55+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@gmail.com</email>
</author>
<published>2018-06-19T04:13:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5af654197263dfac08e17d24e477e27c6990df72'/>
<id>5af654197263dfac08e17d24e477e27c6990df72</id>
<content type='text'>
The sh_pfc_{read,write}() must operate on the register address directly
rather than on an offset, fix this to prevent illegal access.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</content>
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<pre>
The sh_pfc_{read,write}() must operate on the register address directly
rather than on an offset, fix this to prevent illegal access.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: Sync Gen3 PFC tables with Linux v4.17</title>
<updated>2018-06-14T20:35:21+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@gmail.com</email>
</author>
<published>2018-06-10T14:05:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bf8d2dab385b0e85bf041abb004bf484546e2059'/>
<id>bf8d2dab385b0e85bf041abb004bf484546e2059</id>
<content type='text'>
Sync the PFC tables with Linux v4.17.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</content>
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<pre>
Sync the PFC tables with Linux v4.17.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: Sync Gen2 PFC tables with Linux v4.17</title>
<updated>2018-06-14T11:36:33+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@gmail.com</email>
</author>
<published>2018-06-10T14:05:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2e975d862897ad1a453166532ad69a06fd6b9665'/>
<id>2e975d862897ad1a453166532ad69a06fd6b9665</id>
<content type='text'>
Sync the PFC tables with Linux v4.17.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</content>
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<pre>
Sync the PFC tables with Linux v4.17.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-sh</title>
<updated>2018-06-02T20:58:27+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-06-02T01:10:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=040b2583c3a87c83606b3df64ea653ccaf3aea62'/>
<id>040b2583c3a87c83606b3df64ea653ccaf3aea62</id>
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</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>pinctrl: renesas: Initial R8A77990 PFC support</title>
<updated>2018-06-01T07:47:02+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@gmail.com</email>
</author>
<published>2018-04-26T11:09:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cb13e46aeb65140c40930e3d3bad3af08570d5c4'/>
<id>cb13e46aeb65140c40930e3d3bad3af08570d5c4</id>
<content type='text'>
This patch adds initial pinctrl driver to support for the R8A77990 SoC.

Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</content>
<content type='xhtml'>
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<pre>
This patch adds initial pinctrl driver to support for the R8A77990 SoC.

Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: renesas: Add PORT_GP_11 helper macro</title>
<updated>2018-06-01T07:47:01+00:00</updated>
<author>
<name>Takeshi Kihara</name>
<email>takeshi.kihara.df@renesas.com</email>
</author>
<published>2018-03-07T06:26:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=634f9f0d30f4e07bdc10c105a668dc027573f086'/>
<id>634f9f0d30f4e07bdc10c105a668dc027573f086</id>
<content type='text'>
This follows the style of existion PORT_GP_X macros and
will be used by a follow-up patch for the r8a77990 SoC.

Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</content>
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<pre>
This follows the style of existion PORT_GP_X macros and
will be used by a follow-up patch for the r8a77990 SoC.

Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mvebu: pinctrl: Add SD/eMMC PHY selector to the driver</title>
<updated>2018-05-29T06:33:05+00:00</updated>
<author>
<name>Konstantin Porotchkin</name>
<email>kostap@marvell.com</email>
</author>
<published>2018-05-25T06:20:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f5db5979df6a6de12dcf634280d618bb32834ef9'/>
<id>f5db5979df6a6de12dcf634280d618bb32834ef9</id>
<content type='text'>
When the pin control driver selects SD/eMMC function for
a pin group, there is additional configuration to be done
for this case - switch the PHY to work with SDHCI interface.
This patch adds the missing functionality into the pin
control driver.

Signed-off-by: Konstantin Porotchkin &lt;kostap@marvell.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Evan Wang &lt;xswang@marvell.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
When the pin control driver selects SD/eMMC function for
a pin group, there is additional configuration to be done
for this case - switch the PHY to work with SDHCI interface.
This patch adds the missing functionality into the pin
control driver.

Signed-off-by: Konstantin Porotchkin &lt;kostap@marvell.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Evan Wang &lt;xswang@marvell.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
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