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<title>u-boot.git/drivers/pinctrl, branch v2019.04-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl?h=v2019.04-rc2</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl?h=v2019.04-rc2'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2019-02-01T15:59:14Z</updated>
<entry>
<title>pinctrl: Kconfig: fix missing include of rockchip/Kconfig</title>
<updated>2019-02-01T15:59:14Z</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2019-02-01T14:15:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5a127325f0042e5365de74194a6b4fb9ef062216'/>
<id>urn:sha1:5a127325f0042e5365de74194a6b4fb9ef062216</id>
<content type='text'>
After the merge of the new, generic pinctrl-code, the include for
rockchip/Kconfig was missing.  Add it here, so we can select the
pinctrl-driver for SPL.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: Kconfig: sort includes alphabetically</title>
<updated>2019-02-01T15:59:14Z</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2019-02-01T14:11:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=efc46771711a7975aedb18961e70098ddea759c0'/>
<id>urn:sha1:efc46771711a7975aedb18961e70098ddea759c0</id>
<content type='text'>
To make adding new subdirectories easier, let's enforce alphabetical
ordering of the includes of Kconfig files in the respective
subdirectories.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: rockchip: Clean the unused rockchip pinctrl drivers</title>
<updated>2019-02-01T15:59:11Z</updated>
<author>
<name>David Wu</name>
<email>david.wu@rock-chips.com</email>
</author>
<published>2019-01-02T13:02:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=96f73e0d2415439767e9635a7eb0c69382ada605'/>
<id>urn:sha1:96f73e0d2415439767e9635a7eb0c69382ada605</id>
<content type='text'>
If we used the pinctrl-rockchip driver, these code is not needed,
so remove them.

Signed-off-by: David Wu &lt;david.wu@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: rockchip: Add common rockchip pinctrl driver</title>
<updated>2019-02-01T15:59:11Z</updated>
<author>
<name>David Wu</name>
<email>david.wu@rock-chips.com</email>
</author>
<published>2019-01-02T13:00:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e7ae4cf27a6d5837cb5e868712cdaa61d3ceb5e0'/>
<id>urn:sha1:e7ae4cf27a6d5837cb5e868712cdaa61d3ceb5e0</id>
<content type='text'>
Use this driver to fit all Rockchip SOCs and to support
the desired pinctrl configuration via DTS.

Signed-off-by: David Wu &lt;david.wu@rock-chips.com&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3288: Add i2s pinctrl and clock support</title>
<updated>2019-02-01T15:59:10Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2018-12-28T03:15:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3dbfe5ae614a561c3e0c2ccddd7cae0d4cd8f2c8'/>
<id>urn:sha1:3dbfe5ae614a561c3e0c2ccddd7cae0d4cd8f2c8</id>
<content type='text'>
Add support for setting pinctrl and clock for I2S on rk3288. This allows
the sound driver to operate. These settings were created by rkmux.py

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-20190129' of git://git.denx.de/u-boot-imx</title>
<updated>2019-01-30T12:22:12Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-01-30T12:22:12Z</published>
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<id>urn:sha1:748ad078eefea2ee5a3c8e53ca46e9e93c2fc7f1</id>
<content type='text'>
For 2019.04
</content>
</entry>
<entry>
<title>pinctrl: meson: add pinconf support</title>
<updated>2019-01-29T10:19:15Z</updated>
<author>
<name>Jerome Brunet</name>
<email>jbrunet@baylibre.com</email>
</author>
<published>2019-01-04T14:44:34Z</published>
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<id>urn:sha1:c4c726c26bdc09a2c907e230fdf6c75adcc2b674</id>
<content type='text'>
Adding pinconf support is necessary to enable boot from SPI
without breaking the eMMC. When booting from SPI, the ROM code
leave pull downs on the eMMC pad.

We need to set pinconf provided in DT to solve this

Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
[narmstrong: added missing comma in pinctrl-meson-axg-pmx.c]
</content>
</entry>
<entry>
<title>pinctrl: imx: Fix select input issue</title>
<updated>2019-01-28T19:35:47Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2019-01-04T09:08:26Z</published>
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<id>urn:sha1:11a1c27eb454ece04ca4e61f0ea1ab4ebaafa5b5</id>
<content type='text'>
The pinctrl supports to set any bit in input register on iMX6 if
the MSB of input value is 0xff. But the driver uses signed int for
input value, so when executing the codes below, it won't meet.
Because this is arithmetic right shift.

    if (input_val &gt;&gt; 24 == 0xff)

Fix the issue by changing the input_val, config_val and mux_mode to u32.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Reviewed-by: Fugang Duan &lt;fugang.duan@nxp.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mscc: Add gpio and pinctrl for Serval SoC family.</title>
<updated>2019-01-23T17:28:09Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-01-23T15:39:41Z</published>
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<id>urn:sha1:5c31ce36e33d6e6216bfa56d176976eca017afb6</id>
<content type='text'>
The Serval SoC family has 32 pins. Currently there is no
support for Serval in Linux kernel.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mscc: Add gpio and pinctrl for Servalt SoC family.</title>
<updated>2019-01-23T17:27:26Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-01-17T14:33:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=177c07f8293f510eaa3d802eae58c7ed0d664337'/>
<id>urn:sha1:177c07f8293f510eaa3d802eae58c7ed0d664337</id>
<content type='text'>
The Servalt SoC family has 36 pins. Currently there is not support
for Servalt pinctrl in Linux kernel.

Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</content>
</entry>
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