<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/pinctrl, branch v2021.01-rc3</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl?h=v2021.01-rc3</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl?h=v2021.01-rc3'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2020-11-25T11:01:53Z</updated>
<entry>
<title>pinctrl: stmfx: update pin name</title>
<updated>2020-11-25T11:01:53Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2020-10-28T09:51:57Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e27e96aa804ed6aa44df7cd11b307d981d91f072'/>
<id>urn:sha1:e27e96aa804ed6aa44df7cd11b307d981d91f072</id>
<content type='text'>
Update pin name to avoid duplicated name with SOC GPIO
gpio0...gpio15 / agpio0....agpio7: add a stmfx prefix.

This pin name can be used in pinmux command.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: stmfx: update pincontrol and gpio device name</title>
<updated>2020-11-25T11:01:53Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2020-10-28T09:51:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c2a8181d453ea85829dceb0a523cda71e29ea27a'/>
<id>urn:sha1:c2a8181d453ea85829dceb0a523cda71e29ea27a</id>
<content type='text'>
The device name is used in pinmux command and in log trace
so it is better to use the parent parent name ("stmfx@42" for
example) than a generic name ("pinctrl" or "stmfx-gpio")
to identify the device instance.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: stm32: display bias information for all pins</title>
<updated>2020-11-25T11:01:46Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2020-10-28T09:49:07Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b305dbc08b08ab6681bfae8d33adc4f90fd3b9ad'/>
<id>urn:sha1:b305dbc08b08ab6681bfae8d33adc4f90fd3b9ad</id>
<content type='text'>
Display the bias information for input gpios or AF configuration,
and not only for output pin, as described in Reference manual
(Table 81. Port bit configuration table).

Fixes: da7a0bb1f279 ("pinctrl: stm32: add information on pin configuration")
Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: Drop unused members from struct sh_pfc_pinctrl</title>
<updated>2020-11-22T11:49:22Z</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2020-11-04T17:27:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=46f3282b281ce222bcedd4e158629c5a97882933'/>
<id>urn:sha1:46f3282b281ce222bcedd4e158629c5a97882933</id>
<content type='text'>
Drop unused members from struct sh_pfc_pinctrl.

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a7795: Optimize pinctrl image size for R8A774E1</title>
<updated>2020-11-22T11:49:22Z</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2020-10-28T10:34:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2a589b7c51c843e84eb7dbe361c493c2a3551a74'/>
<id>urn:sha1:2a589b7c51c843e84eb7dbe361c493c2a3551a74</id>
<content type='text'>
This driver supports both RZ/G2H and R-Car H3 SoCs.
Optimize pinctrl image size for RZ/G2H, when support for R-Car H3
(R8A7795) is not enabled

Based on the similar patch on Linux.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1</title>
<updated>2020-11-22T11:49:22Z</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2020-10-28T10:34:24Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8b00761c062551733addc40024d9cfa3e1b1d839'/>
<id>urn:sha1:8b00761c062551733addc40024d9cfa3e1b1d839</id>
<content type='text'>
This driver supports both RZ/G2N and R-Car M3-N SoCs.
Optimize pinctrl image size for RZ/G2N, when support for R-Car M3-N
(R8A77965) is not enabled.

Based on the simialr patch on Linux.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1</title>
<updated>2020-11-22T11:49:22Z</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2020-10-28T10:34:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fee13ae8cb2c4dc8a1582e786efa539077c6ff25'/>
<id>urn:sha1:fee13ae8cb2c4dc8a1582e786efa539077c6ff25</id>
<content type='text'>
This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs.
Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+
(R8A7796[01]) is not enabled.

Based on the similar patch on Linux.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a77951: Add R8A774E1 PFC support</title>
<updated>2020-11-22T11:49:22Z</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2020-10-28T10:34:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=975154bc2c96c2d349d27f92a014688344d0cbb0'/>
<id>urn:sha1:975154bc2c96c2d349d27f92a014688344d0cbb0</id>
<content type='text'>
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951),
however it doesn't have several automotive specific peripherals. Add
a r8a77951 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77951 and r8a774e1 SoC.

PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a77965: Add R8A774B1 PFC support</title>
<updated>2020-11-22T11:49:22Z</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2020-10-28T10:34:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c5f376258883947ddcd8b89bb0f458c8008eb0a4'/>
<id>urn:sha1:c5f376258883947ddcd8b89bb0f458c8008eb0a4</id>
<content type='text'>
Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965),
however it doesn't have several automotive specific peripherals. Add
a r8a77965 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77965 and r8a774b1 SoC.

PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: k210: Rename power domains to match datasheet</title>
<updated>2020-11-17T07:09:28Z</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2020-11-13T13:43:40Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6e35c1cb12e7be136baf9f44249baa3279ed7b5c'/>
<id>urn:sha1:6e35c1cb12e7be136baf9f44249baa3279ed7b5c</id>
<content type='text'>
This renames power domains to match the names on the k210 datasheet.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reported-by: Damien Le Moal &lt;Damien.LeMoal@wdc.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</content>
</entry>
</feed>
