u-boot.git/drivers/pinctrl, branch v2022.01 Unnamed repository; edit this file 'description' to name the repository. pinctrl: meson: Correct the driver GPIO declaration 2021-11-19T17:15:26+00:00 Simon Glass sjg@chromium.org 2021-11-13T14:07:15+00:00 886d36efdb98bc0bb44e65e917dea903ab377e54 This should use the provided U_BOOT_DRIVER() macro so that the driver gets added to the appropriate linker list. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 7c9dcfed50f ("pinctrl: meson: rework gx pmx function") Reported-by: Tom Rini <trini@konsulko.com> Tested-by: Tom Rini <trini@konsulko.com> on libretech-cc Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 
This should use the provided U_BOOT_DRIVER() macro so that the driver gets
added to the appropriate linker list. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7c9dcfed50f ("pinctrl: meson: rework gx pmx function")
Reported-by: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com> on libretech-cc
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Merge tag 'u-boot-stm32-20211110' of https://source.denx.de/u-boot/custodians/u-boot-stm 2021-11-10T19:11:30+00:00 Tom Rini trini@konsulko.com 2021-11-10T19:11:30+00:00 166a77b34b30f64f7b12a3016b0bba49d568c52e - DHSOM update: - Remove nWP GPIO hog - Increase SF bus frequency to 50Mhz and enable SFDP - Disable video output for DHSOM - Disable EFI - Enable DFU_MTD support - Create include file for STM32 gpio driver private data - Split board and SOC STM32MP15 configuration - Device tree alignement with v5.15-rc6 for STM32MP15 - Add binman support for STM32MP15x - Normalise newlines for stm32prog - Update OTP shadow registers in SPL 
- DHSOM update:
   - Remove nWP GPIO hog
   - Increase SF bus frequency to 50Mhz and enable SFDP
   - Disable video output for DHSOM
   - Disable EFI
   - Enable DFU_MTD support
- Create include file for STM32 gpio driver private data
- Split board and SOC STM32MP15 configuration
- Device tree alignement with v5.15-rc6 for STM32MP15
- Add binman support for STM32MP15x
- Normalise newlines for stm32prog
- Update OTP shadow registers in SPL
gpio: stm32: create include file for driver private data 2021-11-10T16:03:36+00:00 Patrick Delaunay patrick.delaunay@foss.st.com 2021-10-22T18:12:34+00:00 56a368f6610fec233e803367640cc8ea37251615 The stm32 gpio driver private data are not needed in arch include files, they are not used by code except for stm32 gpio and pincontrol drivers, using the same IP; the defines for this IP is moved in a new file "stm32_gpio_priv.h" in driver/gpio. This patch avoids to have duplicated file gpio.h for each SOC in MPU directory mach-stm32mp and in each MCU directory arch-stm32* and allows to remove CONFIG_GPIO_EXTRA_HEADER for all STM32. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> 
The stm32 gpio driver private data are not needed in arch include files,
they are not used by code except for stm32 gpio and pincontrol drivers,
using the same IP; the defines for this IP is moved in a new file
"stm32_gpio_priv.h" in driver/gpio.

This patch avoids to have duplicated file gpio.h for each SOC
in MPU directory mach-stm32mp and in each MCU directory arch-stm32*
and allows to remove CONFIG_GPIO_EXTRA_HEADER for all STM32.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
exynos78x0: pinctrl: set const to structs 2021-11-09T05:07:46+00:00 Minkyu Kang mk7.kang@samsung.com 2021-11-04T07:13:15+00:00 2b77d9a3ee92604bc5ec98f95c6d453dd4e1493a to fix following checkpatch warings. WARNING: struct should normally be const Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Cc: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> 
to fix following checkpatch warings.
WARNING: struct  should normally be const

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
SoC: exynos: add support for exynos 78x0 2021-10-31T15:25:39+00:00 Dzmitry Sankouski dsankouski@gmail.com 2021-10-17T10:45:41+00:00 69bde0410a9ce5749a4cab5ed134527c2cb8b9e4 Samsung Exynos 7880 \ 7870 - SoC for mainstream smartphones and tablets introduced on March 2017. Features: - 8 Cortex A53 cores - ARM Mali-T830 MP3 GPU - LTE Cat. 7 (7880) or 6 (7870) modem Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com> 
Samsung Exynos 7880 \ 7870 - SoC for mainstream smartphones and tablets
introduced on March 2017.
Features:
- 8 Cortex A53 cores
- ARM Mali-T830 MP3 GPU
- LTE Cat. 7 (7880) or 6 (7870) modem

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
pinctrl: exynos: add support for multiple pin banks 2021-10-31T15:25:39+00:00 Dzmitry Sankouski dsankouski@gmail.com 2021-10-17T10:45:40+00:00 d8428f73c34b6edb322d7736741d069a81919ef6 Iterate all pin banks to find a pin Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com> 
Iterate all pin banks to find a pin

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
pinctrl: single: Add request() api 2021-10-05T12:43:03+00:00 Bharat Gooty bharat.gooty@broadcom.com 2021-08-24T10:16:32+00:00 fd921d20379b2c4544f62a94d642be6aeeb481f0 Add pinctrl_ops->request api to configure pctrl pad register in gpio mode. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org> 
Add pinctrl_ops->request api to configure pctrl
pad register in gpio mode.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
pinctrl: single: Parse gpio details from dt 2021-10-05T12:43:03+00:00 Bharat Gooty bharat.gooty@broadcom.com 2021-08-24T10:16:31+00:00 62f86c6a01690b473545fd6159c680a50b1bfeea Parse different gpio properties from dt as part of probe function. This detail is required to enable pinctrl pad later when gpio lines are requested. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> 
Parse different gpio properties from dt as part of probe
function. This detail is required to enable pinctrl pad
later when gpio lines are requested.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
WS cleanup: remove SPACE(s) followed by TAB 2021-09-30T13:08:16+00:00 Wolfgang Denk wd@denx.de 2021-09-27T15:42:39+00:00 0cf207ec01cbacae47585fcc26591dd2296507d6 Signed-off-by: Wolfgang Denk <wd@denx.de> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
WS cleanup: remove trailing empty lines 2021-09-30T12:08:56+00:00 Wolfgang Denk wd@denx.de 2021-09-27T15:42:36+00:00 66356b4c06c934021f6cb58d93877427162b369f Signed-off-by: Wolfgang Denk <wd@denx.de> 
Signed-off-by: Wolfgang Denk <wd@denx.de>