u-boot.git/drivers/pinctrl, branch v2023.01-rc1

pinctrl: mvebu: Add AlleyCat5 support

2022-11-07T06:46:28Z

This uses the same IP block as the Armada-8K SoCs. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese

pinctrl: nuvoton: Add NPCM8xx pinctrl driver

2022-11-02T17:31:40Z

Add Nuvoton BMC NPCM845 Pinmux and Pinconf support. Signed-off-by: Jim Liu Signed-off-by: Stanley Chu

suniv: add UART1 support

2022-10-19T13:15:02Z

Some boards with the Allwinner F1C100s family SoCs use UART1 for its debug UART, so define the pins for the SPL and the pinmux name and mux value for U-Boot proper. Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec

pinctrl: fix buffer size for pinctrl_generic_set_state_prefix()

2022-10-11T19:40:48Z

This buffer has the concatenated prefix and name written into it, so it must be large enough to cover both strings plus the terminating NUL. Fixes: 92c4a95ec7 ("pinctrl: Add new function pinctrl_generic_set_state_prefix()") Signed-off-by: John Keeping Reviewed-by: Pali Rohár Reviewed-by: Simon Glass

pinctrl: nuvoton: fix set persist error

2022-10-11T19:40:48Z

CA9C is cortex A9 watchdog reset control bit. if device set persist mode, it shouldn't set this bit. Signed-off-by: Jim Liu

pinctrl: mediatek: add pinctrl driver for MT7986 SoC

2022-09-23T19:09:15Z

This patch adds pinctrl and gpio support for MT7986 SoC Reviewed-by: Simon Glass Tested-by: Daniel Golle Signed-off-by: Weijie Gao

pinctrl: mediatek: add pinctrl driver for MT7981 SoC

2022-09-23T19:09:15Z

This patch adds pinctrl and gpio support for MT7981 SoC Reviewed-by: Simon Glass Signed-off-by: Weijie Gao

pinctrl: at91-pio4: Add support for pinctrl config subnodes

2022-09-19T06:51:04Z

Previously, in order for the `pinctrl-*` DT node properties to be properly processed, the pinctrl's subnodes were limited to only having the `pinmux` property as well as other additional properties (slew-rate, bias-disable, etc.). Now, with this patch the pinctrl driver is made to work similarly to the one from Linux. It can now distinguish between one subnode and a subnode with multiple subnodes. Signed-off-by: Sergiu Moga

pinctrl: at91-pio4: Bind GPIO driver to the pinctrl DT node

2022-09-19T06:51:04Z

This has been done in order to align the DT of U-Boot with the DT of Linux. In Linux, a phandle from a '-gpio' DT property is linked to the pinctrl driver, a single driver that handles both pinctrl settings and offers GPIO API to callers. On the other hand, U-Boot redirects such phandle to a corresponding UCLASS_GPIO driver, because U-Boot offers two different types of drivers in this case: UCLASS_PINCTRL which handles pin functions and UCLASS_GPIO which handles gpio requests as a gpio provider. Due to this, we have two drivers in Uboot, but the Devicetree has a single node. Thus, just one of the drivers can be probed for the DT node during platform initialization, before relocation. Our previous solution in U-Boot was to have a different devicetree: the gpio node has a subnode for the pinctrl driver, which is not compliant with Linux ABI. Furthermore, our documentation for this type of nodes mentions no such gpio compatible. After this patch, we can no longer add nodes with a gpio compatible in the DT. Thus, in order to link the pinctrl driver to the gpio one, a hook to the bind method of the former in U-Boot has been added and the GPIO related compatibles have been removed to avoid conflict when compatibles are enumerated and bound to drivers during platform start before relocation. The bind method will attach the GPIO driver to the pinctrl DT node so that every phandle coming from '-gpio' DT properties will be redirected to a valid driver attached to the pinctrl DT node. Signed-off-by: Sergiu Moga

pinctrl: pinctrl_stm32: Populate uc_priv->name[] with pinmux node's name

2022-09-15T13:55:30Z

Populate uc_priv->name[] with pinmux node's name in order to indicate the pinmuxing's name in case GPIO is configured in alternate. For example, for STM32 SoC's based platform, "gpio status" command output : before Bank GPIOZ: GPIOZ0: unused : 0 [ ] GPIOZ1: unused : 0 [ ] GPIOZ2: unused : 0 [ ] GPIOZ3: unused : 0 [ ] GPIOZ4: func GPIOZ5: func GPIOZ6: unused : 0 [ ] GPIOZ7: unused : 0 [ ] GPIOZ8: unknown GPIOZ9: unknown GPIOZ10: unknown GPIOZ11: unknown GPIOZ12: unknown GPIOZ13: unknown GPIOZ14: unknown GPIOZ15: unknown After Bank GPIOZ: GPIOZ0: unused : 0 [ ] GPIOZ1: unused : 0 [ ] GPIOZ2: unused : 0 [ ] GPIOZ3: unused : 0 [ ] GPIOZ4: func i2c4-0 GPIOZ5: func i2c4-0 GPIOZ6: unused : 0 [ ] GPIOZ7: unused : 0 [ ] GPIOZ8: unknown GPIOZ9: unknown GPIOZ10: unknown GPIOZ11: unknown GPIOZ12: unknown GPIOZ13: unknown GPIOZ14: unknown GPIOZ15: unknown Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay