u-boot.git/drivers/pinctrl, branch v2023.04 Unnamed repository; edit this file 'description' to name the repository. pinctrl: renesas: Drop non-existent PFC info table entries 2023-03-10T16:46:09+00:00 Marek Vasut marek.vasut+renesas@mailbox.org 2023-02-28T06:25:53+00:00 ce4681721570494574beff5f47df3d35d5e9aa10 Remove PFC info table entries which are never instantiated, since there are no drivers for those. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> 
Remove PFC info table entries which are never instantiated,
since there are no drivers for those. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
arm64: a37xx: pinctrl: probe after binding 2023-03-01T18:22:27+00:00 Robert Marko robert.marko@sartura.hr 2023-01-17T14:08:15+00:00 1de76a4535a2d617adeb05070d265e2826af3ad6 Currently, pinctrl drivers are getting probed during post-bind, however that is being reverted, and on A37XX pinctrl driver is the one that registers the GPIO driver during the probe. So, if the pinctrl driver doesn't get probed GPIO-s won't get registered and thus they cannot be used. This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s and without them being registered networking won't work as it only has one SFP slot and the TX disable GPIO is on the SB controller. So, lets just add a flag only to A37XX driver to probe after binding in order for the GPIO driver to always get registered. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Simon Glass <sjg@chromium.org> 
Currently, pinctrl drivers are getting probed during post-bind, however
that is being reverted, and on A37XX pinctrl driver is the one that
registers the GPIO driver during the probe.

So, if the pinctrl driver doesn't get probed GPIO-s won't get registered
and thus they cannot be used.

This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s
and without them being registered networking won't work as it only has
one SFP slot and the TX disable GPIO is on the SB controller.

So, lets just add a flag only to A37XX driver to probe after binding
in order for the GPIO driver to always get registered.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Simon Glass <sjg@chromium.org>
rockchip: rk3568: add rk3568 pinctrl driver 2023-02-28T10:07:27+00:00 Jagan Teki jagan@edgeble.ai 2023-02-17T11:58:43+00:00 1977d746aa54ae197a9d5f24414680d3ca321fb1 Add driver supporting pin multiplexing on rk3568 platform. Co-developed-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Co-developed-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
Add driver supporting pin multiplexing on rk3568 platform.

Co-developed-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Co-developed-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Correct SPL use of ATMEL_PIO4 2023-02-10T13:22:52+00:00 Simon Glass sjg@chromium.org 2023-02-05T22:36:17+00:00 42a13b21dcb6663847ae71c0a42dcf2f4149b69a This converts 1 usage of this option to the non-SPL form, since there is no SPL_ATMEL_PIO4 defined in Kconfig Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com> Signed-off-by: Simon Glass <sjg@chromium.org> 
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_ATMEL_PIO4 defined in Kconfig

Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Correct SPL uses of OF_BOARD 2023-02-10T12:41:41+00:00 Simon Glass sjg@chromium.org 2023-02-06T00:54:42+00:00 68be8d95de0a095d624230fe3c43ab3d674bd5b0 This converts 3 usages of this option to the non-SPL form, since there is no SPL_OF_BOARD defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Matthias Brugger <mbrugger@suse.com> 
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_OF_BOARD defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Correct SPL use of SANDBOX 2023-02-10T12:41:40+00:00 Simon Glass sjg@chromium.org 2023-02-05T22:40:42+00:00 ef746bfd2c848740bcb3c9269e96c5d170827b57 This converts 1 usage of this option to the non-SPL form, since there is no SPL_SANDBOX defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> 
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SANDBOX defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
pinctrl: renesas: r8a7796: Add R8A77961 PFC support 2023-02-02T00:49:20+00:00 Hai Pham hai.pham.ud@renesas.com 2023-01-26T20:01:48+00:00 eaa4a7d411c8ff0268dc6d08a4c947c53b1cc19e R-Car M3-W+ (R8A77961) is pin compatible with R-Car M3-W (R8A77960), which allows for both SoCs to share a driver. Based on Linux commit 708c69e9eacc ("pinctrl: sh-pfc: r8a7796: Add R8A77961 PFC support") and 74ce7a8044b0 ("pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1") Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> 
R-Car M3-W+ (R8A77961) is pin compatible with R-Car M3-W (R8A77960),
which allows for both SoCs to share a driver.

Based on Linux commit 708c69e9eacc ("pinctrl: sh-pfc: r8a7796: Add
R8A77961 PFC support") and 74ce7a8044b0 ("pinctrl: renesas: r8a7796:
Optimize pinctrl image size for R8A774A1")

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
pinctrl: renesas: Synchronize R8A779A0 V3U PFC tables with Linux 6.1.7 2023-02-02T00:49:20+00:00 Marek Vasut marek.vasut+renesas@mailbox.org 2023-01-26T20:01:47+00:00 8a9e8ba9ae8190557385362a307371495f7a3103 Synchronize R-Car R8A779A0 V3U PFC tables with Linux 6.1.7, commit 21e996306a6afaae88295858de0ffb8955173a15 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> 
Synchronize R-Car R8A779A0 V3U PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
pinctrl: renesas: Synchronize R8A77995 D3 PFC tables with Linux 6.1.7 2023-02-02T00:49:20+00:00 Marek Vasut marek.vasut+renesas@mailbox.org 2023-01-26T20:01:46+00:00 37fb54b6e65a647c4af672fd21c3b419ef66315c Synchronize R-Car R8A77995 D3 PFC tables with Linux 6.1.7, commit 21e996306a6afaae88295858de0ffb8955173a15 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> 
Synchronize R-Car R8A77995 D3 PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
pinctrl: renesas: Synchronize R8A77990 E3 PFC tables with Linux 6.1.7 2023-02-02T00:49:20+00:00 Marek Vasut marek.vasut+renesas@mailbox.org 2023-01-26T20:01:45+00:00 a22eba36a912ff51d5098f57c11ec8fc256cd930 Synchronize R-Car R8A77990 E3 PFC tables with Linux 6.1.7, commit 21e996306a6afaae88295858de0ffb8955173a15 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> 
Synchronize R-Car R8A77990 E3 PFC tables with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>