<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/pinctrl, branch v2023.07-rc4</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl?h=v2023.07-rc4</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl?h=v2023.07-rc4'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2023-06-08T20:22:38Z</updated>
<entry>
<title>pinctrl: renesas: r8a779a0: Remove incorrect AVB[01] pinmux configuration</title>
<updated>2023-06-08T20:22:38Z</updated>
<author>
<name>Hai Pham</name>
<email>hai.pham.ud@renesas.com</email>
</author>
<published>2023-01-27T13:10:31Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b597b6f9861c2d5531b0055249622ee0e663577c'/>
<id>urn:sha1:b597b6f9861c2d5531b0055249622ee0e663577c</id>
<content type='text'>
AVB[01]_{MAGIC,MDC,MDIO,TXCREFCLK} are registered as both
PINMUX_SINGLE(fn) and PINMUX_IPSR_GPSR(fn) in the pinmux_data array.

The latter are correct, hence remove the former.
Without this fix, the Ethernet PHY is not operational on the MDIO bus.

Ported from Linux kernel commit a145c9a8674ac8fbfa1595276e1b6cbfc5139038 .

Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: LUU HOAI &lt;hoai.luu.ub@renesas.com&gt;
Fixes: 741a7370fc3b8b54 ("pinctrl: renesas: Initial R8A779A0 (V3U) PFC support")
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/r/6fd217b71e83ba9a8157513ed671a1fa218b23b6.1674824958.git.geert+renesas@glider.be
---
Cc: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Cc: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Cc: LUU HOAI &lt;hoai.luu.ub@renesas.com&gt;
Cc: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>imx: move imx8 sci header file to include/firmware/imx</title>
<updated>2023-05-21T14:54:32Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2023-04-28T04:08:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=99ac6c769f92b29a6317ee6beb239269bc59a82d'/>
<id>urn:sha1:99ac6c769f92b29a6317ee6beb239269bc59a82d</id>
<content type='text'>
Move imx8 sci header file to include/firmware/imx, then we could
use build macro to reuse some i.MX8 drivers for i.MX9, such as
drivers/cpu/imx8_cpu.c.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: add R906G032 driver</title>
<updated>2023-05-13T02:01:30Z</updated>
<author>
<name>Ralph Siemsen</name>
<email>ralph.siemsen@linaro.org</email>
</author>
<published>2023-05-13T01:36:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e4aea57fa773ada9443176e2e39af0b4e1750c65'/>
<id>urn:sha1:e4aea57fa773ada9443176e2e39af0b4e1750c65</id>
<content type='text'>
Pinctrl/pinconf driver for Renesas RZ/N1 (R906G032) SoC.

This is quite rudimentary right now, and only supports applying a
default pin configuration as specified by the device tree.

Signed-off-by: Ralph Siemsen &lt;ralph.siemsen@linaro.org&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: set R1/R0 in case pullen/pullsel succeeded</title>
<updated>2023-05-03T13:05:24Z</updated>
<author>
<name>Daniel Golle</name>
<email>daniel@makrotopia.org</email>
</author>
<published>2023-04-12T20:36:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bcfb23ec7ef007f637a699031c8a3417dbb3b7e5'/>
<id>urn:sha1:bcfb23ec7ef007f637a699031c8a3417dbb3b7e5</id>
<content type='text'>
Commit dafe0fbfb0f3 ("pinctrl: mediatek: rewrite mtk_pinconf_set and
related functions") changed the logic deciding to set R0 and R1
registers for V1 devices.

Before:
	/* Also set PUPD/R0/R1 if the pin has them */
	err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PUPD, !pullup);
	if (err != -EINVAL) {
		mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R0, r0);
		mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R1, r1);
	}

After:
	/* try pupd_r1_r0 if pullen_pullsel return error */
	err = mtk_pinconf_bias_set_pullen_pullsel(dev, pin, disable, pullup,
						  val);
	if (err)
		return mtk_pinconf_bias_set_pupd_r1_r0(dev, pin, disable,
						       pullup, val);

Tracing mtk_pinconf_bias_set_pullen_pullsel shows that the function
always either returns 0 in case of success or -EINVAL in case any error
has occurred. Hence the logic responsible of the decision to program R0
and R1 has been inverted.

This leads to problems on BananaPi R2 (MT7623N) when booting from
SDMMC, it turns out accessing eMMC no longer works since
U-Boot 2022.07:

MT7623&gt; mmc dev 0
Card did not respond to voltage select! : -110

The problem wasn't detected for a long time as both eMMC and SDMMC work
fine if they are used to boot from, and hence R0 and R1 were already
setup by the bootrom and/or preloader.

Fix the logic to restore the originally intended and correct behavior
and also change the descriptive comment accordingly.

Fixes: dafe0fbfb0f3 ("pinctrl: mediatek: rewrite mtk_pinconf_set and related functions")
Signed-off-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Tested-By: Frank Wunderlich &lt;frank-w@public-files.de&gt;
</content>
</entry>
<entry>
<title>pinctrl: sunxi: Add NAND pinmuxes</title>
<updated>2023-04-28T00:06:57Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2023-01-22T22:06:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7a85585fbcaf10d50cf8e44a8e46384228c0224d'/>
<id>urn:sha1:7a85585fbcaf10d50cf8e44a8e46384228c0224d</id>
<content type='text'>
NAND is always at function 2 on port C.

Pin lists and mux values were taken from the Linux drivers.

Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-rockchip-20230421' of https://source.denx.de/u-boot/custodians/u-boot-rockchip</title>
<updated>2023-04-23T16:15:56Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-04-23T16:15:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=328fdeb9c9a8178a262dcebb9991a2ffff5788b1'/>
<id>urn:sha1:328fdeb9c9a8178a262dcebb9991a2ffff5788b1</id>
<content type='text'>
- Add rk3588 evb support;
- Update pinctrl for rk3568 and rk3588;
- Update rk3288 dts;
- Update mmc support for rk3568 and rk3588;
- Add rng support for rk3588;
- Add DSI support for rk3568;
- Some other misc fixes in dts, config, driver;
</content>
</entry>
<entry>
<title>Merge https://source.denx.de/u-boot/custodians/u-boot-riscv</title>
<updated>2023-04-22T22:31:46Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-04-22T22:31:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=802132c48a2e6b66ec83b7bb66fb96f2ba87c957'/>
<id>urn:sha1:802132c48a2e6b66ec83b7bb66fb96f2ba87c957</id>
<content type='text'>
* Add StarFive VisionFive v2 Board support
* Support CONFIG_REMAKE_ELF
* Code cleanups for RISC-V architecture
</content>
</entry>
<entry>
<title>pinctrl: rockchip: Fix IO mux selection on RK3568</title>
<updated>2023-04-21T07:16:01Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2023-04-17T19:07:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=518fa3441e1f04806e6151baae4dd4c694a46948'/>
<id>urn:sha1:518fa3441e1f04806e6151baae4dd4c694a46948</id>
<content type='text'>
IO mux selection is not working correctly for all pins. Sync mux route
data from linux to add any missing and update wrong trigger pins to fix
this. Also apply the pull-up fix needed for GPIO0 D3-D6.

Fixes: 1977d746aa54 ("rockchip: rk3568: add rk3568 pinctrl driver")
Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
</content>
</entry>
<entry>
<title>pinctrl: rockchip: support rk3588 pinctrl</title>
<updated>2023-04-21T07:16:00Z</updated>
<author>
<name>Jianqun Xu</name>
<email>jay.xu@rock-chips.com</email>
</author>
<published>2023-03-15T15:32:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4f51064533ff8f27d2859a4ad0c4c367ec28e712'/>
<id>urn:sha1:4f51064533ff8f27d2859a4ad0c4c367ec28e712</id>
<content type='text'>
Add support for Rockchip rk3588 variant of pinctrl.

The driver is adapted from the Linux driver.

Signed-off-by: Jianqun Xu &lt;jay.xu@rock-chips.com&gt;
[eugen.hristev@collabora.com:
port to latest U-boot, bring more changes from Linux
use translated pull values table]
Signed-off-by: Eugen Hristev &lt;eugen.hristev@collabora.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Tested-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
</content>
</entry>
<entry>
<title>pinctrl: starfive: Add StarFive JH7110 driver</title>
<updated>2023-04-20T08:08:44Z</updated>
<author>
<name>Kuan Lim Lee</name>
<email>kuanlim.lee@linux.starfivetech.com</email>
</author>
<published>2023-03-29T03:42:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=732f01aabf53ae97aff9acb92a43c6b3838e6c92'/>
<id>urn:sha1:732f01aabf53ae97aff9acb92a43c6b3838e6c92</id>
<content type='text'>
Add pinctrl driver for StarFive JH7110 SoC.

Signed-off-by: Kuan Lim Lee &lt;kuanlim.lee@linux.starfivetech.com&gt;
Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Signed-off-by: Jianlong Huang &lt;jianlong.huang@starfivetech.com&gt;
Signed-off-by: Yanhong Wang &lt;yanhong.wang@starfivetech.com&gt;
Tested-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
</feed>
