u-boot.git/drivers/pinctrl, branch v2023.10

pinctrl: rockchip: Fix drive and input schmitt on RK3568

2023-08-14T03:07:27+00:00

On RK3568 most pins have a configurable drive strength of level 0-5 and
some pins level 0-11. When rk3568_set_drive is called with a strength
value above 7 the drv value written to reg may overflow into the write
enable bits, resulting in a bad configuration.

This cause e.g. ethernet PHY on Radxa CM3-IO board not to work after
drive is configured according to the device tree.

  Could not get PHY for ethernet@fe010000: addr 0

Level 6-11 can be configured using a second reg for some pins, however
the drv value is reused resulting in lower 6 bits being written to reg.

Input schmitt is configured in 2-bit fields on RK3568 compared to
earlier generation and 2'b10 should be used to enable input schmitt.

Change to use regmap_update_bits with a rmask to fix the overflow issue
and closer match the linux driver. Bit shift the drv value used for the
second reg to configure drive strength level 6-11. Also write correct
values for input schmitt setting.

Fixes: 1977d746aa54 ("rockchip: rk3568: add rk3568 pinctrl driver")
Signed-off-by: Jonas Karlman 
Reviewed-by: Simon Glass 
Reviewed-by: Kever Yang

pinctrl: mediatek: add pinctrl driver for MT7988 SoC

2023-08-03T13:40:50+00:00

This patch adds pinctrl and gpio support for MT7988 SoC

Signed-off-by: Weijie Gao

pinctrl: mediatek: add pinmux_set ops support

2023-08-03T13:40:50+00:00

This patch adds pinmux_set ops for mediatek pinctrl framework

Signed-off-by: Sam Shih 
Signed-off-by: Weijie Gao

pinctrl: mediatek: fix the return value in driving configuration functions

2023-08-03T13:40:50+00:00

The original mediatek pinctrl functions for driving configuration
'mtk_pinconf_drive_set_*' do not return -ENOSUPP even if input
parameters are not supported.
This patch fixes the return value in those functions.

Signed-off-by: Sam Shih 
Signed-off-by: Weijie Gao

pinctrl: mediatek: convert most definitions to const

2023-08-03T13:40:50+00:00

There exists a situation of the mediatek pinctrl driver that may return
wrong pin function value for the pinmux driver:
- All pin function arrays are defined without const
- Some pin function arrays contain all-zero value, e.g.:
  static int mt7622_spi_funcs[] = { 0, 0, 0, 0, 0, 0, };
- These arrays will be put into .bss section during compilation
- .bss section has no "a" attribute and does not exist in the final binary
  file after objcopy.
- FDT binary blob is appended to the u-boot binary, which occupies the
  .bss section.
- During board_f stage, .bss has not been initialized, and contains the
  data of FDT, which is not full-zero data.
- pinctrl driver is initialized in board_f stage, and it will get wrong
  data if another driver is going to set default pinctrl.

Since pinmux information and soc data are only meant to be read-only, thus
should be declared as const. This will force all pinctrl data being put
into .rodata section. Since .rodata has "a" attribute, even the all-zero
data will be allocated and filled with correct value in to u-boot binary.

Signed-off-by: Weijie Gao

arm64: zynqmp: Switch to amd.com emails

2023-07-21T07:00:38+00:00

Update my and DPs email address to match current setup.

Signed-off-by: Michal Simek 
Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com

pinctrl: nuvoton: fix reset reason error for poweron

2023-07-14T16:52:18+00:00

In non tip mode, BMC first power on with PORST+CORST.
the gpio status will error.

Signed-off-by: Jim Liu

Merge tag 'v2023.07-rc6' into next

2023-07-05T15:28:55+00:00

Prepare v2023.07-rc6

pinctrl: rockchip: Fix Data Abort exception in SPL

2023-06-29T10:42:58+00:00

Using CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y and CONFIG_OF_LIVE=y triggers
a Data Abort exception from unaligned memory access when the pinctrl
driver iterate node properties, e.g. for UART2 on RK3568.

  setting mux of GPIO0-24 to 1
  setting mux of GPIO0-24 to 1
  "Synchronous Abort" handler, esr 0x96000021
  elr: 000000000000e554 lr : 000000000000e54c
  x 0: 0000000000000a5c x 1: 0000000000000a5c
  x 2: 0000000000000007 x 3: 0000000000000065
  x 4: 0000000000000007 x 5: 0000000000022d4e
  x 6: 0000000000000a7c x 7: 00000000000227a4
  x 8: 0000000000021cf0 x 9: 0000000000000a7c
  x10: 0000000000021cf0 x11: 0000000000021cf0
  x12: 00000000003fda1c x13: 0000000000000007
  x14: 00000000003fd9ec x15: 000000000001c0ff
  x16: 0000000007000000 x17: 00000000fdccd028
  x18: 00000000003fde20 x19: 0000000000000018
  x20: 0000000000020670 x21: 0000000000000000
  x22: 00000000003fdb00 x23: 00000000003fef90
  x24: 0000000000020688 x25: 0000000000000000
  x26: 0000000000000001 x27: 00000000003ffc50
  x28: 0000000000000000 x29: 00000000003fda60

  Code: b94083e1 97ffd508 93407c01 37f81260 (f9401038)
  Resetting CPU ...

Fix this by replacing the loop to access node properties with use of
ofnode_for_each_prop instead of the current ifdef.

Also continue to next prop instead of aborting at first sign of an
unknown property.

This fixes the Data Abort exception and also pinconf of e.g. pull and
drive in SPL, e.g. for UART2 on RK3568.

  setting mux of GPIO0-24 to 1
  setting mux of GPIO0-24 to 1
  setting pull of GPIO0-24 to 5
  setting mux of GPIO0-25 to 1
  setting mux of GPIO0-25 to 1
  setting pull of GPIO0-25 to 5

Fixes: e7ae4cf27a6d ("pinctrl: rockchip: Add common rockchip pinctrl driver")
Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang

pinctrl: meson: add pinctrl driver for Amlogic A1

2023-06-28T08:05:34+00:00

Based on Linux kernel commit:
dabad1ff85611 (pinctrl: meson: add pinctrl driver support for Meson-A1 SoC)

Signed-off-by: Igor Prusov 
Reviewed-by: Neil Armstrong 
Link: https://lore.kernel.org/r/20230505125639.3605-5-ivprusov@sberdevices.ru
Signed-off-by: Neil Armstrong