u-boot.git/drivers/pinctrl, branch v2024.07 Unnamed repository; edit this file 'description' to name the repository. pinctrl: rockchip: rk3588: Fix support for rockchip_get_mux() 2024-06-14T09:02:49+00:00 Jonas Karlman jonas@kwiboo.se 2024-05-12T12:16:16+00:00 c924f7efbb4fe6c57b63cb74130a9c14db5a3f8d GPIO IOMUX control is located at PMU2_IOC or BUS_IOC offset on RK3588. Based on Linux commit fdc33eba11c5 ("pinctrl/rockchip: add rk3588 support"). Compared to the Linux commit, this include a fix so that the iomux of GPIO0_B4-D7 is reported correctly. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
GPIO IOMUX control is located at PMU2_IOC or BUS_IOC offset on RK3588.

Based on Linux commit fdc33eba11c5 ("pinctrl/rockchip: add rk3588
support").

Compared to the Linux commit, this include a fix so that the iomux of
GPIO0_B4-D7 is reported correctly.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
pinctrl: rockchip: rv1126: Fix support for IOMUX_L_SOURCE_PMU flag 2024-06-14T09:02:49+00:00 Jonas Karlman jonas@kwiboo.se 2024-05-12T12:16:15+00:00 264475514c90de2d432af1953c2d55c86c4e48ac GPIO0_C0-C4 iomux is set using PMUGRF_GPIO0C_IOMUX_L reg on RV1126. This is indicated using the IOMUX_L_SOURCE_PMU flag. Fix reading current mux by fully adopting the IOMUX_L_SOURCE_PMU related code in Linux kernel. Based on Linux commit fd4ea48688c6 ("pinctrl: rockchip: Add RV1126 pinctrl support"). Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
GPIO0_C0-C4 iomux is set using PMUGRF_GPIO0C_IOMUX_L reg on RV1126. This
is indicated using the IOMUX_L_SOURCE_PMU flag. Fix reading current mux
by fully adopting the IOMUX_L_SOURCE_PMU related code in Linux kernel.

Based on Linux commit fd4ea48688c6 ("pinctrl: rockchip: Add RV1126
pinctrl support").

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
pinctrl: rockchip: rk3188: Fix support for IOMUX_GPIO_ONLY flag 2024-06-14T09:02:49+00:00 Jonas Karlman jonas@kwiboo.se 2024-05-12T12:16:14+00:00 4b488940f5d10833d8bd898db4b7615587a5f86e GPIO0_A0-A7 on RK3188 is IOMUX_GPIO_ONLY, however, trying to set gpio mux return an -ENOTSUPP error code. Fix this by validating using the mux function type and not the iomux flag. Based on Linux commit c4a532dee6b6 ("pinctrl: rockchip: handle first half of rk3188-bank0 correctly"). Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
GPIO0_A0-A7 on RK3188 is IOMUX_GPIO_ONLY, however, trying to set gpio
mux return an -ENOTSUPP error code. Fix this by validating using the mux
function type and not the iomux flag.

Based on Linux commit c4a532dee6b6 ("pinctrl: rockchip: handle first
half of rk3188-bank0 correctly").

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" 2024-05-19T14:16:36+00:00 Tom Rini trini@konsulko.com 2024-05-19T02:20:43+00:00 d678a59d2d719da9e807495b4b021501f2836ca5 When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> 
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
pinctrl: Remove <common.h> and add needed includes 2024-05-07T14:00:56+00:00 Tom Rini trini@konsulko.com 2024-05-02T01:31:08+00:00 c45973bc60f319de2737618400883023f2b648da Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> 
Remove <common.h> from this driver directory and when needed
add missing include files directly.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Merge https://source.denx.de/u-boot/custodians/u-boot-snapdragon 2024-04-23T20:13:51+00:00 Tom Rini trini@konsulko.com 2024-04-23T14:33:37+00:00 e78210231924bd28e13c3ed6fd647585117c3fdb Support is added for 5 new Qualcomm SoCs: * QCM2290 and SM6115 are low and mid range SoCs used on the RB1 and RB2 respectively. SM6115 is also used in some mid-range smartphones/tablets. Initial support includes buttons and USB (host and gadget). * SM8250 is a flagship SoC from 2020 used on the RB5, as well as many flagship smartphones. The board can boot to a U-Boot prompt, but is missing regulators necessary for USB support. * SM8550, and SM8650 are flagship mobile SoCs from 2023 and 2024 respectively. Found on many high end smartphones. In addition: * Support is added for the Schneider HMIBSC board. * mach-snapdragon switches to OF_UPSTREAM * IPQ40xx gets several regressions fixed and some overall cleanup. * The MSM serial driver gains the ability to generate the bit-clock automatically, no longer relying on a custom DT property. * The Qualcomm SMMU driver gets a generic compatible (so per-SoC compatibles don't need to be added). * Support for the GENI I2C controller is added. * The qcom SPMI driver has SPMI v5 support fixed, and v7 support added. * The qcom sdhci driver gets some fixes for SDCC v5 support. * SDM845 gains sdcard support * Support is added for the Synopsys eUSB2 PHY driver (used on SM8550 and SM8650) * SYS_INIT_SP_BSS_OFFSET is set to 1.5M to give us more space for FDTs. * RB2 gets a work-around to fix the USB dr_mode property before booting Linux. 
Support is added for 5 new Qualcomm SoCs:

* QCM2290 and SM6115 are low and mid range SoCs used on the RB1 and RB2
  respectively. SM6115 is also used in some mid-range smartphones/tablets.
  Initial support includes buttons and USB (host and gadget).
* SM8250 is a flagship SoC from 2020 used on the RB5, as well as many flagship
  smartphones. The board can boot to a U-Boot prompt, but is missing regulators
  necessary for USB support.
* SM8550, and SM8650 are flagship mobile SoCs from 2023 and 2024
  respectively. Found on many high end smartphones.

In addition:

* Support is added for the Schneider HMIBSC board.
* mach-snapdragon switches to OF_UPSTREAM
* IPQ40xx gets several regressions fixed and some overall cleanup.
* The MSM serial driver gains the ability to generate the bit-clock
  automatically, no longer relying on a custom DT property.
* The Qualcomm SMMU driver gets a generic compatible (so per-SoC compatibles
  don't need to be added).
* Support for the GENI I2C controller is added.
* The qcom SPMI driver has SPMI v5 support fixed, and v7 support added.
* The qcom sdhci driver gets some fixes for SDCC v5 support.
* SDM845 gains sdcard support
* Support is added for the Synopsys eUSB2 PHY driver (used on SM8550 and SM8650)
* SYS_INIT_SP_BSS_OFFSET is set to 1.5M to give us more space for FDTs.
* RB2 gets a work-around to fix the USB dr_mode property before booting Linux.
pinctrl: qcom: apq8016: Add GPIO pinctrl function 2024-04-23T11:29:24+00:00 Sumit Garg sumit.garg@linaro.org 2024-04-12T09:54:36+00:00 095d96d67ea2415380175bee81da906ecaaa6794 Add GPIO pinctrl function to enable driving GPIO pins as output low or high. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> 
Add GPIO pinctrl function to enable driving GPIO pins as output low or
high.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
pinctrl: qcom: Add support for driving GPIO pins output 2024-04-23T11:29:23+00:00 Sumit Garg sumit.garg@linaro.org 2024-04-12T09:54:35+00:00 b04f0cd2714bbb606d5c57c6d8e398de987b7cce Add support for driving the GPIO pins as output low or high. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> 
Add support for driving the GPIO pins as output low or high.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
apq8016: Add support for UART1 clocks and pinmux 2024-04-23T11:29:22+00:00 Sumit Garg sumit.garg@linaro.org 2024-04-12T09:54:33+00:00 6e992a6bc85ce40a9b24924db52ce90c9efc3005 SE HMIBSC board uses UART1 as the main debug console, so add corresponding clocks and pinmux support. Along with that update instructions to enable clocks for debug UART support. Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> 
SE HMIBSC board uses UART1 as the main debug console, so add
corresponding clocks and pinmux support. Along with that update
instructions to enable clocks for debug UART support.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
pinctrl: qcom: ipq4019: support all pin functions 2024-04-23T11:29:21+00:00 Robert Marko robert.marko@sartura.hr 2024-04-22T11:43:28+00:00 8c4c6a268e35523e6a8130f93c51b60a6341e8a2 Currently, IPQ4019 pinctrl driver supports only a very limited number of pin functions and is not fully DT compatible with Linux pinctrl nodes. IPQ40xx SoC-s sometimes use different pin function numbers for the same function depending on the pin number, so for example I2C0 on GPIO58 uses function number 3 while on GPIO59 it uses function number 2. So, in order to make the driver compatible with upstream DTS to avoid the need to patch the pinctrl nodes in U-Boot and support all of the missing pin functions lets rework the driver based on upstream Linux IPQ4019 pinctrl driver and the pending SM8150 U-Boot pinctrl driver which also uses different function numbers pased on the exact pin number. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> 
Currently, IPQ4019 pinctrl driver supports only a very limited number of
pin functions and is not fully DT compatible with Linux pinctrl nodes.

IPQ40xx SoC-s sometimes use different pin function numbers for the same
function depending on the pin number, so for example I2C0 on GPIO58 uses
function number 3 while on GPIO59 it uses function number 2.

So, in order to make the driver compatible with upstream DTS to avoid the
need to patch the pinctrl nodes in U-Boot and support all of the missing
pin functions lets rework the driver based on upstream Linux IPQ4019
pinctrl driver and the pending SM8150 U-Boot pinctrl driver which also uses
different function numbers pased on the exact pin number.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>