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<title>u-boot.git/drivers/pinctrl, branch v2025.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>pinctrl: renesas: Fix R-Car spelling</title>
<updated>2024-12-11T07:36:24+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2024-12-11T07:30:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4380b31e406bdbd49371a003cac92432486a7c2e'/>
<id>4380b31e406bdbd49371a003cac92432486a7c2e</id>
<content type='text'>
The correct spelling is R-Car, including the dash, update the usage.
Kconfig strings and comment changes only, no functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
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<pre>
The correct spelling is R-Car, including the dash, update the usage.
Kconfig strings and comment changes only, no functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: rzg2l: Drop unnecessary scope</title>
<updated>2024-12-08T22:06:52+00:00</updated>
<author>
<name>Paul Barker</name>
<email>paul.barker.ct@bp.renesas.com</email>
</author>
<published>2024-11-20T09:48:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3a735cff5f2ec4d426e27d57da835a075388464c'/>
<id>3a735cff5f2ec4d426e27d57da835a075388464c</id>
<content type='text'>
In rzg2l_pinconf_set(), there are no new variables defined in the case
statement for PIN_CONFIG_INPUT_ENABLE so no additional scope is needed.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
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<pre>
In rzg2l_pinconf_set(), there are no new variables defined in the case
statement for PIN_CONFIG_INPUT_ENABLE so no additional scope is needed.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: rzg2l: Support Ethernet TXC output enable</title>
<updated>2024-12-08T22:06:52+00:00</updated>
<author>
<name>Paul Barker</name>
<email>paul.barker.ct@bp.renesas.com</email>
</author>
<published>2024-11-20T09:48:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bba516a772853595901a7359209bc588d2bffda0'/>
<id>bba516a772853595901a7359209bc588d2bffda0</id>
<content type='text'>
On the RZ/G2L SoC family, the direction of the Ethernet TXC/TX_CLK
signal is selectable to support an Ethernet PHY operating in either MII
or RGMII mode. By default, the signal is configured as an input and MII
mode is supported. The ETH_MODE register can be modified to configure
this signal as an output to support RGMII mode.

As this signal is be default an input, and can optionally be switched to
an output, it maps neatly onto an `output-enable` property in the device
tree.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
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<pre>
On the RZ/G2L SoC family, the direction of the Ethernet TXC/TX_CLK
signal is selectable to support an Ethernet PHY operating in either MII
or RGMII mode. By default, the signal is configured as an input and MII
mode is supported. The ETH_MODE register can be modified to configure
this signal as an output to support RGMII mode.

As this signal is be default an input, and can optionally be switched to
an output, it maps neatly onto an `output-enable` property in the device
tree.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: rzg2l: Support 2.5V PVDD for Ethernet interfaces</title>
<updated>2024-12-08T22:06:52+00:00</updated>
<author>
<name>Paul Barker</name>
<email>paul.barker.ct@bp.renesas.com</email>
</author>
<published>2024-11-20T09:48:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=215663f5e47db92c6c13107e877a943c3e70aa2a'/>
<id>215663f5e47db92c6c13107e877a943c3e70aa2a</id>
<content type='text'>
The Ethenet interfaces on the Renesas RZ/G2L SoC family can operate at
multiple power supply voltages: 3.3V (default value), 2.5V and 1.8V.

rzg2l_pinconf_set() is extended to support the 2.5V setting, with a
check to ensure this is only used on Ethernet interfaces as it is not
supported on the SD &amp; QSPI interfaces.

While we're modifying rzg2l_pinconf_set(), drop the unnecessary default
value for pwr_reg as it is set in every branch of the following if
condition.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
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<pre>
The Ethenet interfaces on the Renesas RZ/G2L SoC family can operate at
multiple power supply voltages: 3.3V (default value), 2.5V and 1.8V.

rzg2l_pinconf_set() is extended to support the 2.5V setting, with a
check to ensure this is only used on Ethernet interfaces as it is not
supported on the SD &amp; QSPI interfaces.

While we're modifying rzg2l_pinconf_set(), drop the unnecessary default
value for pwr_reg as it is set in every branch of the following if
condition.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-samsung</title>
<updated>2024-12-03T18:37:20+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-12-03T18:37:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f96e5133184aac377b54bd61f8abf78710f2ee56'/>
<id>f96e5133184aac377b54bd61f8abf78710f2ee56</id>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>pinctrl: rockchip: allow to build for TPL</title>
<updated>2024-11-11T07:14:14+00:00</updated>
<author>
<name>Quentin Schulz</name>
<email>quentin.schulz@cherry.de</email>
</author>
<published>2024-11-06T11:29:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5bc65f5cab2369e0053d19df356b4bcb31150409'/>
<id>5bc65f5cab2369e0053d19df356b4bcb31150409</id>
<content type='text'>
A later commit will make use of the pinctrl driver in TPL so let's add
the ability to build the Rockchip pinctrl driver in TPL.

Reviewed-by: Paul Kocialkowski &lt;paulk@sys-base.io&gt;
Signed-off-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
A later commit will make use of the pinctrl driver in TPL so let's add
the ability to build the Rockchip pinctrl driver in TPL.

Reviewed-by: Paul Kocialkowski &lt;paulk@sys-base.io&gt;
Signed-off-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: exynos: fix type of count integer</title>
<updated>2024-11-05T05:26:13+00:00</updated>
<author>
<name>Henrik Grimler</name>
<email>henrik@grimler.se</email>
</author>
<published>2024-09-10T18:37:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e5565c24bb49f477c4326d2b5275ed88b50af1ef'/>
<id>e5565c24bb49f477c4326d2b5275ed88b50af1ef</id>
<content type='text'>
unsigned int count is used to capture return of dev_read_string_count.
When an error occurs dev_read_string_count returns -ve, which can
hence not be handled correctly. Use int instead of unsigned int so
that errors are detected.

Fixes: 16ca80adc551 ("pinctrl: Add pinctrl driver support for Exynos7420 SoC")

Signed-off-by: Henrik Grimler &lt;henrik@grimler.se&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
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<pre>
unsigned int count is used to capture return of dev_read_string_count.
When an error occurs dev_read_string_count returns -ve, which can
hence not be handled correctly. Use int instead of unsigned int so
that errors are detected.

Fixes: 16ca80adc551 ("pinctrl: Add pinctrl driver support for Exynos7420 SoC")

Signed-off-by: Henrik Grimler &lt;henrik@grimler.se&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge patch series "Support Aspeed SGPIO controller"</title>
<updated>2024-10-29T22:17:47+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-29T18:12:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e28e70e392306626b750bedb4225bee24db40466'/>
<id>e28e70e392306626b750bedb4225bee24db40466</id>
<content type='text'>
Billy Tsai &lt;billy_tsai@aspeedtech.com&gt; says:

AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one
with 80 pins, AST2500/AST2400 SoC has 1 SGPIO master interface that
supports up to 80 pins.

Link: https://lore.kernel.org/r/20241016085955.314236-1-billy_tsai@aspeedtech.com
</content>
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<pre>
Billy Tsai &lt;billy_tsai@aspeedtech.com&gt; says:

AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one
with 80 pins, AST2500/AST2400 SoC has 1 SGPIO master interface that
supports up to 80 pins.

Link: https://lore.kernel.org/r/20241016085955.314236-1-billy_tsai@aspeedtech.com
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: ast2600: Add SGPIO to device tree</title>
<updated>2024-10-29T18:12:04+00:00</updated>
<author>
<name>Billy Tsai</name>
<email>billy_tsai@aspeedtech.com</email>
</author>
<published>2024-10-16T08:59:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4d5510774d4905f1966388098cf918ca27118197'/>
<id>4d5510774d4905f1966388098cf918ca27118197</id>
<content type='text'>
Add SGPIO DTS node and enable them for AST2600 EVB.

Signed-off-by: Billy Tsai &lt;billy_tsai@aspeedtech.com&gt;
</content>
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<pre>
Add SGPIO DTS node and enable them for AST2600 EVB.

Signed-off-by: Billy Tsai &lt;billy_tsai@aspeedtech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: ast2500: Add SGPIO to device tree</title>
<updated>2024-10-29T18:12:04+00:00</updated>
<author>
<name>Billy Tsai</name>
<email>billy_tsai@aspeedtech.com</email>
</author>
<published>2024-10-16T08:59:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=be298254bee70b4914f9630e04dc5a8968b0d0fc'/>
<id>be298254bee70b4914f9630e04dc5a8968b0d0fc</id>
<content type='text'>
Add SGPIO DTS node and enable it for AST2500 EVB.

Signed-off-by: Billy Tsai &lt;billy_tsai@aspeedtech.com&gt;
</content>
<content type='xhtml'>
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<pre>
Add SGPIO DTS node and enable it for AST2500 EVB.

Signed-off-by: Billy Tsai &lt;billy_tsai@aspeedtech.com&gt;
</pre>
</div>
</content>
</entry>
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