u-boot.git/drivers/pinctrl, branch v2025.10-rc2

pinctrl: sunxi: add Allwinner A523 pinctrl description

2025-07-27T21:57:35Z

The new DT pinctrl binding would allow us to read the pinmux values from the DT, but it is actually easier to just continue with hardcoding the mux values in the driver, and matching them against the "function" name. Add the values for the primary and secondary pin controller on the A523. Signed-off-by: Andre Przywara

pinctrl-uclass: update comment to reflect code

2025-07-14T18:44:04Z

The logic was updated without modifying the comment above it Fixes: 72b8c6d1ebf ("pinctrl: don't fall back to pinctrl_select_state_simple()") Signed-off-by: Philip Molloy

pinctrl: Port pin controller driver for T-Head TH1520 SoC

2025-07-03T10:10:58Z

The SoC pads of TH1520 are separated into three groups (AP 1, AP 2 and AON) controlled by independent pin controllers. This patch ports their driver from Linux kernel with most code for setting pinconf and pinmux kept as is. The dt-binding of TH1520 pin controller uses a schema where pins to configure are specfied as strings and looked up at runtime, which the generic pinctrl helpers of U-Boot cannot parse, thus a customized set_state() callback is implemented to parse pinconfig nodes and setup the configuration. Signed-off-by: Yao Zi Acked-by: Leo Yu-Chi Liang

arm: pinctrl: Define .mux_mask field for NXP's SoC

2025-06-29T13:07:55Z

The commit e8a9521e649f ("vf500/vf610: synchronise device trees with linux") has synchronized U-Boot's DTS with v5.19 Linux kernel. It turned out that in Linux's upstream iomuxc node description the 'fsl,mux_mask' was missing, so the U-Boot's pinctrl driver for NXP's Vybrid SoC was not working properly. As by default the mux mask was set to 0, for example the vf610 based boards (like BK4) were bricked, due to misconfiguration of gpio at early boot stage. The fix for all NXP eligible boards is to define .mux_mask field for soc specific *pinctrl_soc_info structure and use it directly in pinctrl MMIO driver, without the need to read the "fsl,mux_mask" property from device tree. This change brings the NXP's pinctrl driver in U-Boot closer to Linux upstream one. Signed-off-by: Lukasz Majewski Reviewed-by: Peng Fan #for i.MX8ULP

pinctrl: qcom: Add ipq5424 pinctrl driver

2025-06-23T16:50:21Z

Add pinctrl driver for the TLMM block found in the ipq5424 SoC. Signed-off-by: Varadarajan Narayanan Reviewed-by: Casey Connolly Link: https://lore.kernel.org/r/20250304110105.2762124-6-quic_varada@quicinc.com Signed-off-by: Casey Connolly

pinctrl: gpio: sx150x: add Semtech SX150x I2C GPIO expander and pinctrl driver

2025-06-03T23:18:03Z

implement a driver to use semtech pinctrl and gpio expander, this driver is adapted from a existent linux driver that is written by Gregory Bean . Signed-off-by: Anis Chali

pinctrl: rockchip: constify rockchip_pin_ctrl for RV1108

2025-05-06T07:59:43Z

There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz Reviewed-by: Kever Yang

pinctrl: rockchip: constify rockchip_pin_ctrl for RK3399

2025-05-06T07:59:43Z

There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz Reviewed-by: Kever Yang

pinctrl: rockchip: constify rockchip_pin_ctrl for RK3368

2025-05-06T07:59:43Z

There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz Reviewed-by: Kever Yang

pinctrl: rockchip: constify rockchip_pin_ctrl for RK3328

2025-05-06T07:59:43Z

There's no need to modify private data from the controller, so let's make that struct const. Signed-off-by: Quentin Schulz Reviewed-by: Kever Yang