<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/pinctrl, branch v2026.01-rc3</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl?h=v2026.01-rc3</id>
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<updated>2025-11-13T15:30:26Z</updated>
<entry>
<title>pinctrl: renesas: r8a779h0: Remove STPWT_EXTFXR</title>
<updated>2025-11-13T15:30:26Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2025-11-07T16:16:57Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f71eea7f85ab85b74f4968c1e1e46369614d3903'/>
<id>urn:sha1:f71eea7f85ab85b74f4968c1e1e46369614d3903</id>
<content type='text'>
Rev.0.81 of the R-Car V4M Series Hardware User’s Manual removed the
"STPWT_EXTFXR" signal from the pin control register tables.  As this is
further unused in the pin control driver, it can be removed safely.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779h0: Remove CC5_OSCOUT</title>
<updated>2025-11-13T15:30:26Z</updated>
<author>
<name>Huy Bui</name>
<email>huy.bui.wm@renesas.com</email>
</author>
<published>2025-11-07T16:16:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c2583a837e027378b496c384cd6029586b595293'/>
<id>urn:sha1:c2583a837e027378b496c384cd6029586b595293</id>
<content type='text'>
Rev.0.71 of the R-Car V4M Series Hardware User’s Manual removed the
"CC5_OSCOUT" signal from the pin control register tables.  As this is
further unused in the pin control driver, it can be removed safely.

Signed-off-by: Huy Bui &lt;huy.bui.wm@renesas.com&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779g0: Remove STPWT_EXTFXR</title>
<updated>2025-11-13T15:30:26Z</updated>
<author>
<name>Huy Bui</name>
<email>huy.bui.wm@renesas.com</email>
</author>
<published>2025-11-07T16:16:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=51205a6e39d489583c06718dbc52c6bc0e805c30'/>
<id>urn:sha1:51205a6e39d489583c06718dbc52c6bc0e805c30</id>
<content type='text'>
Rev.1.30 of the R-Car V4H Series Hardware User’s Manual removed the
"STPWT_EXTFXR" signal from the pin control register tables.  As this is
further unused in the pin control driver, it can be removed safely.

Signed-off-by: Huy Bui &lt;huy.bui.wm@renesas.com&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779g0: Remove CC5_OSCOUT</title>
<updated>2025-11-13T15:30:26Z</updated>
<author>
<name>Huy Bui</name>
<email>huy.bui.wm@renesas.com</email>
</author>
<published>2025-11-07T16:16:54Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5a616724f04aa90d91f92dbc0979ecf957c049cb'/>
<id>urn:sha1:5a616724f04aa90d91f92dbc0979ecf957c049cb</id>
<content type='text'>
Rev.1.30 of the R-Car V4H Series Hardware User’s Manual removed the
"CC5_OSCOUT" signal from the pin control register tables.  As this is
further unused in the pin control driver, it can be removed safely.

Signed-off-by: Huy Bui &lt;huy.bui.wm@renesas.com&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: r8a779g0: Remove AVB[01]_MII</title>
<updated>2025-11-13T15:30:26Z</updated>
<author>
<name>Thanh Quan</name>
<email>thanh.quan.xn@renesas.com</email>
</author>
<published>2025-11-07T16:16:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f261367462d134c3047888461af1f90b27c1c516'/>
<id>urn:sha1:f261367462d134c3047888461af1f90b27c1c516</id>
<content type='text'>
Rev.1.30 of the R-Car V4H Series Hardware User’s Manual removed the
"AVB[01]_MII_*" signals from the pin control register tables.  As these
are further unused in the pin control driver, they can be removed
safely.

Signed-off-by: Thanh Quan &lt;thanh.quan.xn@renesas.com&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: Add initial R8A78000 R-Car X5H PFC tables</title>
<updated>2025-11-06T19:09:59Z</updated>
<author>
<name>Huy Bui</name>
<email>huy.bui.wm@renesas.com</email>
</author>
<published>2025-10-27T16:53:54Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1261a630732461d509531a914c325280eeb2e8a3'/>
<id>urn:sha1:1261a630732461d509531a914c325280eeb2e8a3</id>
<content type='text'>
Add initial pin control tables for the Renesas R-Car X5H R8A78000 SoC.
This SoC is the first one which includes custom DRV register handling,
different from previous generations due to change in DRV register bit
layout.

Signed-off-by: Huy Bui &lt;huy.bui.wm@renesas.com&gt;
Signed-off-by: Khanh Le &lt;khanh.le.xr@renesas.com&gt;
Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: Move drive strength configuration into sh_pfc_soc_operations</title>
<updated>2025-11-06T19:09:59Z</updated>
<author>
<name>Hai Pham</name>
<email>hai.pham.ud@renesas.com</email>
</author>
<published>2025-10-27T16:53:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=73bdd6a7dc2941fda6efcfa832d1993d1950f042'/>
<id>urn:sha1:73bdd6a7dc2941fda6efcfa832d1993d1950f042</id>
<content type='text'>
The upcoming Renesas R-Car Gen5 uses different mapping of bits in DRV
control register, which is incompatible with existing DRV register bit
mapping. Add .set_drive_strength callback into sh_pfc_soc_operations
and call it from sh_pfc_pinconf_set(), to allow each SoC specific PFC
driver to implement replacement .set_drive_strength. Make the current
sh_pfc_pinconf_set_drive_strength() non-static, rename it with rcar_
prefix, and pass it as .set_drive_strength for existing PFC drivers.
This is a preparatory patch for R-Car Gen5, no functional change.

Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
[Marek: Consistently use .set_drive_strength() and pass exisiting
        sh_pfc_pinconf_set_drive_strength() as its parameter for
	all PFC drivers. Rewrite commit message.]
</content>
</entry>
<entry>
<title>pinctrl: renesas: Show bit position in config write</title>
<updated>2025-11-06T19:09:59Z</updated>
<author>
<name>Hai Pham</name>
<email>hai.pham.ud@renesas.com</email>
</author>
<published>2025-10-27T16:53:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1306e10b50f0aa28c42a25acb384b618e6d286a3'/>
<id>urn:sha1:1306e10b50f0aa28c42a25acb384b618e6d286a3</id>
<content type='text'>
Show bit position in config write debug log, which is helpful for cases
where the p port setting is applied at the exact p bit position.

Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt; # Unsplit the string
</content>
</entry>
<entry>
<title>pinctrl: renesas: Align Kconfig entry indent</title>
<updated>2025-11-06T19:09:59Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-10-27T16:53:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7db190def05ce208f7c826b2149f165a651a985f'/>
<id>urn:sha1:7db190def05ce208f7c826b2149f165a651a985f</id>
<content type='text'>
Fix Kconfig entry indent to be always consistently indented with
leading tabs, never with leading spaces. No functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: add SM7150 pinctrl driver</title>
<updated>2025-10-29T11:27:33Z</updated>
<author>
<name>Danila Tikhonov</name>
<email>danila@jiaxyga.com</email>
</author>
<published>2025-08-31T00:46:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=23fc229eb422cb48c0786869cb90bd3f2b24839b'/>
<id>urn:sha1:23fc229eb422cb48c0786869cb90bd3f2b24839b</id>
<content type='text'>
This SoC features a pinctrl block with north, south, and west tiles
accessible to the AP.

Signed-off-by: Danila Tikhonov &lt;danila@jiaxyga.com&gt;
Co-developed-by: Jens Reidel &lt;adrian@mainlining.org&gt;
Signed-off-by: Jens Reidel &lt;adrian@mainlining.org&gt;
Link: https://lore.kernel.org/r/20250831004602.699953-3-adrian@mainlining.org
Signed-off-by: Casey Connolly &lt;kcxt@postmarketos.org&gt;
</content>
</entry>
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