<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/pinctrl, branch v2026.04-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pinctrl?h=v2026.04-rc2</id>
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<updated>2026-01-28T20:28:48Z</updated>
<entry>
<title>pinctrl: mediatek: add pinmux_property_set ops support</title>
<updated>2026-01-28T20:28:48Z</updated>
<author>
<name>Vitor Sato Eschholz</name>
<email>vsatoes@baylibre.com</email>
</author>
<published>2026-01-22T16:38:23Z</published>
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<id>urn:sha1:15999c22f5df791364f0eb6d646c36d735c74f16</id>
<content type='text'>
Add pinmux_property_set ops for mediatek pinctrl framework

Signed-off-by: Julien Masson &lt;jmasson@baylibre.com&gt;
Signed-off-by: Vitor Sato Eschholz &lt;vsatoes@baylibre.com&gt;
Signed-off-by: Julien Stephan &lt;jstephan@baylibre.com&gt;
Reviewed-by: Macpaul Lin &lt;macpaul.lin@mediatek.com&gt;
Tested-by: David Lechner &lt;dlechner@baylibre.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: Add pinctrl driver for MT8188 SoC</title>
<updated>2026-01-28T20:28:48Z</updated>
<author>
<name>Chris-QJ Chen</name>
<email>chris-qj.chen@mediatek.com</email>
</author>
<published>2026-01-22T16:38:22Z</published>
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<id>urn:sha1:aa6eb2a5895bb9f0f311522b7d4dd3b86629f8b2</id>
<content type='text'>
Add pinctrl driver for mt8188. The driver is based on the kernel driver.

Signed-off-by: Chris-QJ Chen &lt;chris-qj.chen@mediatek.com&gt;
Signed-off-by: Jill.Wu &lt;shu-yun.wu@mediatek.com&gt;
Signed-off-by: Vitor Sato Eschholz &lt;vsatoes@baylibre.com&gt;
Signed-off-by: Julien Stephan &lt;jstephan@baylibre.com&gt;
Reviewed-by: Macpaul Lin &lt;macpaul.lin@mediatek.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: mt8365: add PUPD registers</title>
<updated>2026-01-21T19:33:08Z</updated>
<author>
<name>David Lechner</name>
<email>dlechner@baylibre.com</email>
</author>
<published>2026-01-14T01:53:44Z</published>
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<id>urn:sha1:fd871fc6bb497c6ddd7b39622480b89add78f57b</id>
<content type='text'>
Add pull-up/pull-down (PUPD) register definitions for mt8365.

Signed-off-by: David Lechner &lt;dlechner@baylibre.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: fix failing to get syscon</title>
<updated>2026-01-21T19:30:55Z</updated>
<author>
<name>David Lechner</name>
<email>dlechner@baylibre.com</email>
</author>
<published>2026-01-14T22:37:19Z</published>
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<id>urn:sha1:04413ed0c1bde24bdb4a15e5d75a33f1f3fa8bfa</id>
<content type='text'>
Replace uclass_get_device_by_ofnode() with syscon_regmap_lookup_by_phandle()
to get the "mediatek,pctl-regmap" syscon device.

Depending on probe order, uclass_get_device_by_ofnode() may fail, but
syscon_regmap_lookup_by_phandle() has logic in it to handle that case
correctly.

The previous implementation could read more than one syscon if the
"mediatek,pctl-regmap" property had more than one phandle, but the one
board with a devicetree that does that is not supported in U-Boot yet,
so we can save that for later (it may never be needed).

Fixes: 424ceba18bfb ("pinctrl: mediatek: support mediatek,pctl-regmap property")
Signed-off-by: David Lechner &lt;dlechner@baylibre.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: ignored error return from pupd/r1/r0</title>
<updated>2026-01-21T19:29:28Z</updated>
<author>
<name>David Lechner</name>
<email>dlechner@baylibre.com</email>
</author>
<published>2026-01-14T01:48:31Z</published>
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<id>urn:sha1:2d665b9cd361c4b6d100d3b1b5bdb6e0d1725486</id>
<content type='text'>
Ignore the error return value from mtk_pinconf_bias_set_pupd_r1_r0().
The PUPD/R1/R0 registers only include a small subset of the pins, so
it is normal for this function to return an error for most pins.
Therefore, this error should not be propagated.

This fixes not all pins in a pinmux group being configured in some
cases because the propagated error caused the configuration loop to
exit early.

The rest of the function is refactored to return early on errors to
improve readability.

Signed-off-by: David Lechner &lt;dlechner@baylibre.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: set array size for reg_cals</title>
<updated>2026-01-21T19:29:25Z</updated>
<author>
<name>David Lechner</name>
<email>dlechner@baylibre.com</email>
</author>
<published>2026-01-13T23:25:52Z</published>
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<id>urn:sha1:e63e2e797e3ccf85a8394425e954c06e435c161c</id>
<content type='text'>
Set the size of the reg_cals arrays to PINCTRL_PIN_REG_MAX to in all
affected mediatek pinctrl drivers. This is needed to avoid potential
out-of-bounds accesses when they is used in mtk_hw_pin_field_get().
All array members need to be initialized since the code loops from 0
to PINCTRL_PIN_REG_MAX - 1. mt7622_reg_cals was already defined this
way, but the others were not.

Signed-off-by: David Lechner &lt;dlechner@baylibre.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: add PINCTRL_QCOM_GENERIC to enable all drivers by default</title>
<updated>2026-01-14T15:25:09Z</updated>
<author>
<name>Aswin Murugan</name>
<email>aswin.murugan@oss.qualcomm.com</email>
</author>
<published>2026-01-07T15:47:44Z</published>
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<id>urn:sha1:25a260c2cbcc3fadb1059f9b20e38e06038ccf4b</id>
<content type='text'>
Introduce a new Kconfig option PINCTRL_QCOM_GENERIC that, when selected,
enables all Qualcomm pinctrl drivers by default. This simplifies defconfigs
for platforms supporting multiple SoCs and avoids manual driver selection.
Individual drivers can still be disabled if required.

Signed-off-by: Aswin Murugan &lt;aswin.murugan@oss.qualcomm.com&gt;
Reviewed-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
Link: https://patch.msgid.link/20260107154745.571319-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: add driver for QCS615 SoC</title>
<updated>2026-01-14T15:25:09Z</updated>
<author>
<name>Aswin Murugan</name>
<email>aswin.murugan@oss.qualcomm.com</email>
</author>
<published>2025-11-12T16:47:57Z</published>
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<id>urn:sha1:46a66c02e9d5211f9c5b2380246680e6bfb31ff5</id>
<content type='text'>
Add pinctrl driver for QCS615. Driver code is based on the
similar U-Boot and Linux drivers.

Signed-off-by: Aswin Murugan &lt;aswin.murugan@oss.qualcomm.com&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Link: https://patch.msgid.link/20251112164758.1560041-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly &lt;casey.connolly@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: mediatek: MT7981: fix GPIO9 register map</title>
<updated>2026-01-13T15:42:44Z</updated>
<author>
<name>Shiji Yang</name>
<email>yangshiji66@outlook.com</email>
</author>
<published>2026-01-03T08:42:39Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a1d1fc8d8c8699d80e1b9ab3214752e5882d3740'/>
<id>urn:sha1:a1d1fc8d8c8699d80e1b9ab3214752e5882d3740</id>
<content type='text'>
Ported from the Mediatek SDK. The upstream Linux kernel also has the
same register map as the SDK.

Signed-off-by: Shiji Yang &lt;yangshiji66@outlook.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "pinctl: mediatek: add mt8365 support"</title>
<updated>2026-01-12T19:41:54Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-01-12T19:41:54Z</published>
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<id>urn:sha1:476c59be74c2eadcd32fc3032fb7ac362f02e441</id>
<content type='text'>
David Lechner &lt;dlechner@baylibre.com&gt; says:

MT8365 has different pinctrl register layout compared to other SoCs in
the family, so needs its own driver.

This is also the first SoC in this family supported in U-Boot using an
upstream devicetree that has the mediatek,pctl-regmap property, so we
need to add support for that to the common mediatek pinctrl code first.

Link: https://lore.kernel.org/r/20260106-pinctl-mtk-mt8365-v1-0-0ca3eb382468@baylibre.com
</content>
</entry>
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