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<title>u-boot.git/drivers/power, branch v2025.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/power?h=v2025.10</id>
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<updated>2025-08-30T15:28:20Z</updated>
<entry>
<title>power: rk8xx: allow to customize RK806 reset mode</title>
<updated>2025-08-30T15:28:20Z</updated>
<author>
<name>Quentin Schulz</name>
<email>quentin.schulz@cherry.de</email>
</author>
<published>2025-08-13T14:07:43Z</published>
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<id>urn:sha1:1961bba4bc341573db98a6fd34eac771e914681f</id>
<content type='text'>
The RK806 PMIC has a bitfield for configuring the restart/reset behavior
(which I assume Rockchip calls "function") whenever the PMIC is reset
either programmatically (c.f. DEV_RST in the datasheet) or via PWRCTRL
or RESETB pins.

For RK806, the following values are possible for RST_FUN:

0b00 means "Restart PMU"
0b01 means "Reset all the power off reset registers, forcing
	the state to switch to ACTIVE mode"
0b10 means "Reset all the power off reset registers, forcing
	the state to switch to ACTIVE mode, and simultaneously
	pull down the RESETB PIN for 5mS before releasing"
0b11 means the same as for 0b10 just above.

This adds the appropriate logic in the driver to parse the new
rockchip,reset-mode DT property to pass this information. It just
happens that the values in the binding match the values to write in the
bitfield so no mapping is necessary.

For backward compatibility reasons, if the property is missing we set it
to 0b10 (i.e. BIT(7)) like before this commit was merged instead of
leaving it untouched like in the kernel driver.

Note that this does nothing useful for U-Boot at the moment as the ways
to reset the device (e.g. via `reset` command) doesn't interact with the
RK8xx PMIC and simply does a CPU reset.
Considering the upstream Linux kernel left this register untouched until
(assumed) v6.17[1], this is useful for cases in which the U-Boot
bootloader has this patch (and running with a DT with
rockchip,reset-mode property set) and running an upstream kernel before
(assumed) v6.17, or alternatively later without the property in the
kernel DT.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git/commit/?id=87b48d86b77686013f5c2a8866ed299312b671db

Signed-off-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>arch: arm: agilex5: Enable power manager for Agilex5</title>
<updated>2025-07-30T09:45:31Z</updated>
<author>
<name>Alif Zakuan Yuslaimi</name>
<email>alif.zakuan.yuslaimi@altera.com</email>
</author>
<published>2025-06-12T08:08:00Z</published>
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<id>urn:sha1:9f689086863dfae693551a68fc9dc426bca5727e</id>
<content type='text'>
Agilex5 FSBL is required to disable the power of unused peripheral SRAM
blocks to reduce power consumption.

Introducing a new power manager driver for Agilex5 which will be called
as part of Agilex5 SPL initialization process.

This driver will read the peripheral handoff data obtained from the
bitstream and will power off the specified peripheral's SRAM from the
handoff data values.

Signed-off-by: Alif Zakuan Yuslaimi &lt;alif.zakuan.yuslaimi@altera.com&gt;
Reviewed-by: Tien Fong Chee &lt;tien.fong.chee@altera.com&gt;
</content>
</entry>
<entry>
<title>power: regulator: add AXP323 support</title>
<updated>2025-07-27T21:57:35Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2024-09-23T22:59:22Z</published>
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<id>urn:sha1:1063678a7011aff8ea768074d3c5f2c5cc27fd73</id>
<content type='text'>
The X-Powers AXP323 is very close sibling to the AXP313A, only that it
adds support for dual-phasing the first two DC/DC converters.

We do not really care about this particular feature, so just add the new
compatible string and tie it to the existing AXP313A support code.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-master-20250724' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx</title>
<updated>2025-07-24T21:31:17Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-07-24T21:31:17Z</published>
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<id>urn:sha1:021783860f7e628f7c4e0c101707cd4250e6d61f</id>
<content type='text'>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27149

- Add support for the NXP imx93 frdm board.
- imx93_evk and phycore-imx93 cleanups.
- Convert imx6dl-sielaff to OF_UPSTREAM and fix serial download mode boot.
- Fix crash in imx power-domain.
- Migrate Phytec imx8mm boards to standard boot.
- Fix smatch warnings.
</content>
</entry>
<entry>
<title>uclass: Cleanup uclass_find_next_device</title>
<updated>2025-07-24T17:49:18Z</updated>
<author>
<name>Andrew Goodbody</name>
<email>andrew.goodbody@linaro.org</email>
</author>
<published>2025-07-16T09:58:39Z</published>
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<id>urn:sha1:70bf6e33e15e2ce56f6e3e9a3f725136c9c6f486</id>
<content type='text'>
uclass_find_next_device always returns 0, so instead make it a void and
update calling sites.

Signed-off-by: Andrew Goodbody &lt;andrew.goodbody@linaro.org&gt;
</content>
</entry>
<entry>
<title>imx: power-domain: Fix crash due to uninitialized 'id' field</title>
<updated>2025-07-24T10:59:22Z</updated>
<author>
<name>Frieder Schrempf</name>
<email>frieder.schrempf@kontron.de</email>
</author>
<published>2025-07-22T08:31:18Z</published>
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<id>urn:sha1:4a9d6b2e1d963899cac443d931d29fa23a47ff23</id>
<content type='text'>
In case of the i.MX8M power-domains (i.MX8MQ, MM, MN) there is only
one power-domain for each device. Therefore the 'id' field in struct
power_domain should always be zero.

Currently if a power-domain is accessed after the initial bind, the
'id' field is left uninitialized. This didn't cause any problems
until the following commits were introduced:

9086b64ca071 ("power-domain: Add support for refcounting (again)")
a785ef24487b ("imx: power-domain: Enable refcounting on imx8mp")

Now the 'id' field gets accessed in the power_domain_off() sequence
and the invalid value causes "Synchronous Abort" failures.

This was observed on a i.MX8MM board when running "usb start" and
then "usb stop".

Fix this issue by setting power_domain-&gt;id to '0' in
imx8m_power_domain_of_xlate().

Signed-off-by: Frieder Schrempf &lt;frieder.schrempf@kontron.de&gt;
Fixes: d08a194871fd ("imx: add support for i.MX8MQ power domain controller")
Fixes: 9086b64ca071 ("power-domain: Add support for refcounting (again)")
Reviewed-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Hex value prefix case cleanup"</title>
<updated>2025-06-14T15:10:48Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-06-14T15:10:48Z</published>
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<id>urn:sha1:03817a2a8046ea89dac2be72ce0c16a9faa5570b</id>
<content type='text'>
E Shattow &lt;e@freeshell.de&gt; says:

Make consistent use of lowercase hexadecimal prefix '0x' throughout U-Boot.

There are a few remaining uses of uppercase 'X' to denote hexadecimal prefix
or placeholder in documentation and error messages.

External devicetree-rebasing dts/upstream and the generated code of
xilinx/zynq are ignored for the series.

Link: https://lore.kernel.org/r/20250606224558.1117422-1-e@freeshell.de
</content>
</entry>
<entry>
<title>drivers: use lowercase hex prefix style</title>
<updated>2025-06-14T15:09:39Z</updated>
<author>
<name>E Shattow</name>
<email>e@freeshell.de</email>
</author>
<published>2025-06-06T22:44:58Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=449a5566522f07b4c8d58f3a6bdc36a74400e672'/>
<id>urn:sha1:449a5566522f07b4c8d58f3a6bdc36a74400e672</id>
<content type='text'>
Use consistent lowercase hex prefix style in drivers/*

Does not change hex prefix case in allcaps uppercase style error messages

Signed-off-by: E Shattow &lt;e@freeshell.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'v2025.07-rc4' into next</title>
<updated>2025-06-09T22:28:28Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-06-09T22:28:28Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=59d00e20fced23e6463aa09db889dd548baee677'/>
<id>urn:sha1:59d00e20fced23e6463aa09db889dd548baee677</id>
<content type='text'>
Prepare v2025.07-rc4
</content>
</entry>
<entry>
<title>power: rk8xx: fix swapped mask and value in init registers for RK806</title>
<updated>2025-06-06T09:23:34Z</updated>
<author>
<name>Quentin Schulz</name>
<email>quentin.schulz@cherry.de</email>
</author>
<published>2025-05-28T12:07:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b8101af3ce56a547f373d273d9ea37aefb74dc5a'/>
<id>urn:sha1:b8101af3ce56a547f373d273d9ea37aefb74dc5a</id>
<content type='text'>
The val (the bits to set) is the second member of the reg_data structure
and mask the third one. We obviously want to clear bits 6 and 7 in order
to only set bit 7 in there instead of only clearing bit 7 in order to
write bits 6 and 7 (which makes no sense).

Fortunately, according to the datasheet, bit 6 value doesn't matter when
bit 7 is set so this is essentially just a cosmetic change, no intended
change in behavior.

Fixes: f172575d92cd ("power: rk8xx: add support for RK806")
Signed-off-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
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