u-boot.git/drivers/pwm, branch v2022.07

driver: pwm: pwm-imx: separe dm from non dm implementation

2022-04-12T17:10:44Z

Separe dm implementation from non dm implementation of pwm-imx driver using CONFIG_DM_PWM Signed-off-by: Tommaso Merciai

drivers: pwm: pwm-imx: move pwm-imx-util into pwm-imx

2022-04-12T17:10:44Z

Move pwm_imx_get_parms, pwm_id_to_reg functions into pwm-imx.c and drop off pwm-imx-util.c Signed-off-by: Tommaso Merciai

driver: pwm: pwm-imx: introduce pwm_dm_imx_get_parms

2022-04-12T15:33:55Z

Introduce pwm_dm_imx_get_parms, dm version of pwm_imx_get_parms. This function get clock rate using clk dm api Signed-off-by: Tommaso Merciai

driver: pwm: pwm-imx: get and enable per/ipg clock using dm

2022-04-12T15:33:55Z

Get and enable ipg/per pwms clocks using dm api into imx_pwm_of_to_plat and imx_pwm_probe driver function Signed-off-by: Tommaso Merciai

Merge tag 'xilinx-for-v2022.07-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

2022-04-05T15:27:39Z

Xilinx changes for v2022.07-rc1 v2 xilinx: - Allow booting bigger kernels till 100MB zynqmp: - DT updates (reset IDs) - Remove unneeded low level uart initialization from psu_init* - Enable PWM features - Add support for 1EG device serial_zynq: - Change fifo behavior in DEBUG mode zynq_sdhci: - Fix BASECLK setting calculation clk_zynqmp: - Add support for showing video clock gpio: - Update slg driver to handle DT flags net: - Update ethernet_id code to support also DM_ETH_PHY - Add support for DM_ETH_PHY in gem driver - Enable dynamic mode for SGMII config in gem driver pwm: - Add driver for cadence PWM versal: - Add support for reserved memory firmware: - Handle PD enabling for SPL - Add support for IOUSLCR SGMII configurations include: - Sync phy.h with Linux - Update xilinx power domain dt binding headers

Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi

2022-04-05T12:33:32Z

A big part is the DM pinctrl driver, which allows us to get rid of quite some custom pinmux code and make the whole port much more robust. Many thanks to Samuel for that nice contribution! There are some more or less cosmetic warnings about missing clocks right now, I will send the trivial fixes for that later. Another big chunk is the mkimage upgrade, which adds RISC-V and TOC0 (secure images) support. Both features are unused at the moment, but I have an always-secure board that will use that once the DT lands in the kernel. On top of those big things we have some smaller fixes, improving the I2C DM support, fixing some H6/H616 early clock setup and improving the eMMC boot partition support. The gitlab CI completed successfully, including the build test for all 161 sunxi boards. I also boot tested on a A64, A20, H3, H6, and F1C100 board. USB, SD card, eMMC, and Ethernet all work there (where applicable).

pwm: sunxi: Remove non-DM pin setup

2022-04-04T22:24:17Z

This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland Reviewed-by: Andre Przywara Signed-off-by: Andre Przywara

pwm: Add driver for cadence TTC

2022-03-30T12:50:47Z

TTC has three modes of operations. Timer, PWM and input counters. There is already driver for timer under CADENCE_TTC_TIMER which is used for ZynqMP R5 configuration. This driver is targeting PWM which is for example configuration which can be used for fan control. The driver has been tested on Xilinx Kria SOM platform where fan is connected to one PL pin. When TTC output is connected via EMIO to PL pin TTC pwm can be configured and tested for example like this: pwm config 0 0 10000 1200 pwm enable 0 0 pwm config 0 0 10000 1400 pwm config 0 0 10000 1600 Signed-off-by: Michal Simek Reviewed-by: Sean Anderson Link: https://lore.kernel.org/r/915a662ddb88f7a958ca1f307e8fea59af9d7feb.1634303847.git.michal.simek@xilinx.com

pwm: Add Aspeed ast2600 PWM support

2022-03-25T17:35:50Z

This patch add the support of PWM controller which can be found at aspeed ast2600 soc. The pwm supoorts up to 16 channels and it's part function of multi-function device "pwm-tach controller". Signed-off-by: Billy Tsai Reviewed-by: Simon Glass Reviewed-by: Chia-Wei Wang

exynos: pwm: Deal with a PWM at 100%

2021-11-09T02:57:22Z

At present the counter never hits the comparitor in this case. Add a special case. This ensures that the snow backlight works when at full brightness. Fixes: 76c2ff3e5fd video: backlight: fix pwm's duty cycle calculation Signed-off-by: Simon Glass Signed-off-by: Minkyu Kang