<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/ram/Kconfig, branch v2020.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/ram/Kconfig?h=v2020.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/ram/Kconfig?h=v2020.01'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2019-11-17T08:23:56Z</updated>
<entry>
<title>ram: px30: add sdram driver</title>
<updated>2019-11-17T08:23:56Z</updated>
<author>
<name>YouMin Chen</name>
<email>cym@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=39edfaa758a1f875dfed8d8749e4c84c21db6e2a'/>
<id>urn:sha1:39edfaa758a1f875dfed8d8749e4c84c21db6e2a</id>
<content type='text'>
Add the sdram driver for PX30 to support ddr3, ddr4, lpddr2 and lpddr3.

For TPL_BUILD, the driver implement full dram init and without DM
support due to the limit of internal SRAM size.
For SPL and U-Boot proper, it's a simple driver with dm for get
dram_info like other SoCs.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>ram: k3-j721e: Add support for J721E DDR controller</title>
<updated>2019-10-25T21:33:21Z</updated>
<author>
<name>Kevin Scholz</name>
<email>k-scholz@ti.com</email>
</author>
<published>2019-10-07T13:56:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3bb3f266ee617384bb282a6818f675b5aca5c371'/>
<id>urn:sha1:3bb3f266ee617384bb282a6818f675b5aca5c371</id>
<content type='text'>
The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper
logic to integrate these blocks in the device. The DDR subsystem is
used to provide an interface to external SDRAM devices which can be
utilized for storing program or data. Introduce support for the
DDR controller and DDR phy within the DDR subsystem.

Signed-off-by: Kevin Scholz &lt;k-scholz@ti.com
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
</content>
</entry>
<entry>
<title>ram: rockchip: Add initial Kconfig</title>
<updated>2019-07-19T03:11:09Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2019-07-15T18:28:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=82ee138def96acc19d72c5b77eb126c625b06ba0'/>
<id>urn:sha1:82ee138def96acc19d72c5b77eb126c625b06ba0</id>
<content type='text'>
Right now sdram drivers in rockchip SoC are built based
on the SoC configs which may not be an adequate solutions
while adding common or debug driver.

So, add meaningful Kconfig options start with rk3399.

Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Kever Yang &lt;Kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>ram: Introduce K3 AM654 DDR Sub System driver</title>
<updated>2018-11-16T21:51:58Z</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2018-11-02T14:21:02Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=06bda1259ffc3ef899de70c7fb86b0982a2912f0'/>
<id>urn:sha1:06bda1259ffc3ef899de70c7fb86b0982a2912f0</id>
<content type='text'>
K3 based AM654 devices has DDR memory subsystem that comprises
Synopys DDR controller, Synopsis DDR phy and wrapper logic to
intergrate these blocks into the device. This DDR subsystem
provides an interface to external SDRAM devices. Adding support
for the initialization of the external SDRAM devices by
configuring the DDRSS registers and using the buitin PHY
routines.

Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Signed-off-by: Andreas Dannenberg &lt;dannenberg@ti.com&gt;
Signed-off-by: Keerthy &lt;j-keerthy@ti.com&gt;
Signed-off-by: Schuyler Patton &lt;spatton@ti.com&gt;
Signed-off-by: James Doublesin &lt;doublesin@ti.com&gt;
</content>
</entry>
<entry>
<title>ram: Add driver for MPC83xx</title>
<updated>2018-09-18T06:01:18Z</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2018-08-06T08:23:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e40615565d68465284b3c6a5fc4147f662824a88'/>
<id>urn:sha1:e40615565d68465284b3c6a5fc4147f662824a88</id>
<content type='text'>
Add a RAM driver for the MPC83xx architecture.

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
</entry>
<entry>
<title>ram: stm32mp1: add driver</title>
<updated>2018-03-19T20:14:21Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2018-03-12T09:46:11Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e70f70aa6504bd6387c0a6d117e48383c5048b6b'/>
<id>urn:sha1:e70f70aa6504bd6387c0a6d117e48383c5048b6b</id>
<content type='text'>
Add driver and binding for stm32mp1 ddr controller and phy

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>ram: kconfig: s/SPL/TPL/ in TPL_RAM help text</title>
<updated>2017-08-26T18:56:06Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2017-08-25T14:46:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=93fd5b0ac185fd81d2e2c658a4dad4fc63f1a690'/>
<id>urn:sha1:93fd5b0ac185fd81d2e2c658a4dad4fc63f1a690</id>
<content type='text'>
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
</entry>
<entry>
<title>spl: dm: Kconfig: introduce TPL_RAM (in analogy to SPL_RAM)</title>
<updated>2017-08-13T15:12:20Z</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-06-28T23:42:40Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c336c3c35f53d01fad0699237d5645440e454df6'/>
<id>urn:sha1:c336c3c35f53d01fad0699237d5645440e454df6</id>
<content type='text'>
To allow finer grained selection of features for TPL, we introduce
TPL_RAM (in analogy to SPL_RAM).

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>spl: dm: Kconfig: SPL_RAM depends on SPL_DM</title>
<updated>2017-08-13T15:12:20Z</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-06-28T23:41:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=45233301b69d10ae84aa7568672eb31769ba7b48'/>
<id>urn:sha1:45233301b69d10ae84aa7568672eb31769ba7b48</id>
<content type='text'>
This commit models the dependency from SPL_RAM to SPL_DM in Kconfig.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>stm32f7: sdram: move sdram driver code to ram drivers area</title>
<updated>2017-05-08T15:39:02Z</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2017-04-10T22:02:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bf1ae4426b89bd8b3e036e012acc4bc88fec4c6e'/>
<id>urn:sha1:bf1ae4426b89bd8b3e036e012acc4bc88fec4c6e</id>
<content type='text'>
Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
cc: Christophe KERELLO &lt;christophe.kerello@st.com&gt;
</content>
</entry>
</feed>
