u-boot.git/drivers/ram/aspeed/Kconfig, branch master

Merge patch series "arm: aspeed: add initial AST2700 SoC support"

2026-06-29T21:29:56Z

Ryan Chen says: AST2700 is the 8th generation of Integrated Remote Management Processor introduced by ASPEED Technology Inc. It is a Board Management Controller (BMC) SoC family with a dual-die architecture: SoC0 ("CPU" die with four ARM Cortex-A35 application cores) and SoC1 ("IO" die with peripherals) each SoC have its own SCU PLLs, clock dividers and reset domains. Link: https://lore.kernel.org/r/20260612-ast2700_clk-v4-0-9bea29cfdc39@aspeedtech.com

ram: aspeed: add SDRAM controller driver for AST2700

2026-06-29T19:43:21Z

Add a SDRAM controller driver for the AST2700, derived from the existing AST2700 controller code used by the Ibex SPL but adapted to run from ARM U-Boot proper on the Cortex-A35 cores. The DDR4/DDR5 controller and its DesignWare PHY are programmed by the Ibex SPL before ARM U-Boot proper takes over. This driver reads back the configuration left by the SPL, probes the controller, and exposes ram_info (base and size, with the VGA carve-out subtracted) via UCLASS_RAM so that dram_init() can populate gd->ram_size. The PHY firmware-load entry points (dwc_ddrphy_phyinit_userCustom_*) are kept compiled but call a __weak fmc_hdr_get_prebuilt() stub when ARM U-Boot proper is the caller; the real implementation is provided by the Ibex SPL via the same fmc_hdr.h descriptor format (here added for the ARM build). Adds the supporting register-layout headers under arch/arm/include/asm/arch-aspeed/: - sdram.h: SDRAM controller and DWC PHY register definitions - scu.h: SCU bits referenced by the SDRAM driver - fmc_hdr.h: prebuilt-blob descriptor (binary-compatible with arch/riscv/include/asm/arch-ast2700/fmc_hdr.h used by the Ibex SPL) Signed-off-by: Ryan Chen

Kconfig: drivers: restyle remaining

2026-06-25T21:00:58Z

Restyle all Kconfigs for the rest of "drivers": Menu entries : no space left Menu attributes: 1 TAB Help text : 1 TAB + 2 spaces Replace '---help---' by 'help' Signed-off-by: Johan Jonker [trini: Add missing indentation on a few more multi-paragraph help texts] Signed-off-by: Tom Rini

ram: ast2700: Add DRAM controller initialization

2024-09-11T12:35:03Z

Add driver for AST2700 to initialize DRAM in SPL. This patch also refactors the Kconfig dependency of Aspeed DRAM drivers as some of them are shared among the file structures of RV and ARM ISAs. Signed-off-by: Chia-Wei Wang Acked-by: Leo Yu-Chi Liang

ram: aspeed: Rework kconfig options

2022-03-10T18:49:57Z

Ensure the ASPEED related options are grouped together under the RAM option when enabling support. This also makes some minor grammar corrections and renames options so they present cleanly in menuconfig. There should be no functional change to the configuration or binary. Signed-off-by: Joel Stanley Reviewed-by: Dylan Hung

Kconfig: Remove all default n/no options

2021-08-31T21:47:49Z

default n/no doesn't need to be specified. It is default option anyway. Signed-off-by: Michal Simek [trini: Rework FSP_USE_UPD portion] Signed-off-by: Tom Rini

ram: aspeed: Add AST2600 DRAM control support

2021-01-18T20:19:15Z

AST2600 supports DDR4 SDRAM with maximum speed DDR4-1600. The DDR4 DRAM types including 128MbX16 (2Gb), 256MbX16 (4Gb), 512MbX16 (8Gb), 1GbX16 (16Gb), and 1GbX8 TwinDie (16Gb) are supported. Signed-off-by: Dylan Hung Signed-off-by: Chia-Wei, Wang Reviewed-by: Ryan Chen

ram: add ddr4 dual x8 configuration

2020-10-08T14:58:45Z

the aspeed ddr sdram controller needs to know if the memory chip mounted on the board is dual x8 die or not. Or it may get the wrong size of the memory space. Signed-off-by: Dylan Hung Reviewed-by: Ryan Chen