u-boot.git/drivers/ram/k3-ddrss, branch v2026.01Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/drivers/ram/k3-ddrss?h=v2026.012025-08-19T17:26:20Zram: k3-ddrss: Support multiple ECC regions for a single controller2025-08-19T17:26:20ZNeha Malcom Francisn-francis@ti.com2025-08-12T12:43:24Zurn:sha1:0824703fb2b49ed64edee6f8db483bedfa0189dd
K3 Inline ECC mechanism can support up to 3 regions of inline ECC, add
this support for single controller.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Add support for partial inline ECC in multi-DDR systems2025-08-19T17:26:20ZNeha Malcom Francisn-francis@ti.com2025-08-12T12:43:23Zurn:sha1:d1efbc8d65702f9eb7d032e904e092a2fd3075b3
The existing approach does not account for interleaving in the DDRs when
setting up regions. There is support for MSMC to calculate the regions
for each DDR, so modify k3_ddrss_probe to set the regions accordingly
for multi-DDR systems.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Add support for MSMC calculation of DDR inline ECC regions2025-08-19T17:26:20ZNeha Malcom Francisn-francis@ti.com2025-08-12T12:43:22Zurn:sha1:c32ac5b3b934942fdcd97ee631ca2362032e0e53
Add support for calculation of the protected regions for each DDR in
multi-DDR systems. Since MSMC is the parent node of the individual DDRs
as well as responsible for their interleaving, it only makes sense for
MSMC to contain the logic for dividing the regions.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Add support for number of controllers under MSMC2025-08-19T17:26:20ZNeha Malcom Francisn-francis@ti.com2025-08-12T12:43:21Zurn:sha1:2310aac8ae0180ad78da1d44657f846610296e4d
In K3 multi-DDR systems, the MSMC is responsible for the interleave
mechanism across all the DDR controllers. Add support for MSMC to obtain
the number of controllers it's responsible for using the DT.
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Add support for a partial inline ECC region2025-08-19T17:26:19ZNeha Malcom Francisn-francis@ti.com2025-08-12T12:43:19Zurn:sha1:f43f710122541f870ba164e8121445003032c71c
Instead of defaulting to choosing the entire DDR region when enabling
inline ECC, allow picking of a range within the DDR space using DT to
enable.
It expects such a node within the memory node, in the absence of which
we resort to enabling inline ECC for the entire DDR region:
inline_ecc: protected@9e780000 {
device_type = "ecc";
reg = <0x9e780000 0x0080000>;
bootph-all;
};
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Add comment about ecc_reserved_space2025-08-19T17:26:19ZNeha Malcom Francisn-francis@ti.com2025-08-12T12:43:18Zurn:sha1:1c70e33b0aca6d5d84145636400e496feb19c8b9
The reserved space needed for storing the parity remains the same no
matter the size of the region that is being protected. Add this as a
comment for better code understanding.
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: s/K3_DDRSS_MAX_ECC_REGIONS/K3_DDRSS_MAX_ECC_REG2025-08-19T17:26:19ZNeha Malcom Francisn-francis@ti.com2025-08-12T12:43:17Zurn:sha1:e511c651f6dd0ec89a4b7dec25140540740cf13e
To prevent checkpatch warning once we start using this macro more
frequently, shorten the length of it. While at it, also move the
structure k3_ddrss_ecc_region above k3_msmc so that future patches can
have it as a member of k3_msmc.
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Use DDR address instead of system address for ecc_regions2025-08-19T17:26:19ZNeha Malcom Francisn-francis@ti.com2025-08-12T12:43:16Zurn:sha1:520d9c2521f4082209ce5121be1b3c1eae98994c
Let ecc_regions[x].start reflect the start of the ECC region in terms of
DDR addressing rather than system addressing. This will make it easier
to extend the usage of the same ecc_regions structure for multi-DDR
systems as well.
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Use logical and not bitwise2025-08-15T20:17:30ZAndrew Goodbodyandrew.goodbody@linaro.org2025-08-08T10:47:43Zurn:sha1:460db5b44dba0ec93bbfec3bdf537fba7a487714
The test for the interrupt LPDDR4_INTR_BIST_DONE is using a bitwise and
but the test is simple logic so use the more appropriate logical and.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
drivers: use lowercase hex prefix style2025-06-14T15:09:39ZE Shattowe@freeshell.de2025-06-06T22:44:58Zurn:sha1:449a5566522f07b4c8d58f3a6bdc36a74400e672
Use consistent lowercase hex prefix style in drivers/*
Does not change hex prefix case in allcaps uppercase style error messages
Signed-off-by: E Shattow <e@freeshell.de>