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<title>u-boot.git/drivers/ram/rockchip/Kconfig, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>ram: rockchip: Fix dependency of RAM_ROCKCHIP_DEBUG</title>
<updated>2025-06-06T09:12:20+00:00</updated>
<author>
<name>Lukasz Czechowski</name>
<email>lukasz.czechowski@thaumatec.com</email>
</author>
<published>2025-05-20T11:36:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6773a46f1131fe95bcddb7472635e07a5fd249f8'/>
<id>6773a46f1131fe95bcddb7472635e07a5fd249f8</id>
<content type='text'>
The RAM_ROCKCHIP_DEBUG can be used only if DEBUG_UART is
available.
The next commit introduces changes in definition of debug
uart functions, so that DEBUG_UART is required to be defined
in order to initialize uart and use print functions.

Signed-off-by: Lukasz Czechowski &lt;lukasz.czechowski@thaumatec.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
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<pre>
The RAM_ROCKCHIP_DEBUG can be used only if DEBUG_UART is
available.
The next commit introduces changes in definition of debug
uart functions, so that DEBUG_UART is required to be defined
in order to initialize uart and use print functions.

Signed-off-by: Lukasz Czechowski &lt;lukasz.czechowski@thaumatec.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rockchip: Add common ddr type configs</title>
<updated>2023-01-16T10:01:10+00:00</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2022-12-14T17:50:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=26f92be07e2a0e380a67c88a53911a10422d9855'/>
<id>26f92be07e2a0e380a67c88a53911a10422d9855</id>
<content type='text'>
We have common ddr types in rockchip or in general. So use
the common ddr type names instead of per Rockchip SoC to
avoid confusion.

The respective ddr type names will use on the associated
ddr SoC driver as these drivers are built per SoC at a time.

Signed-off-by: Jagan Teki &lt;jagan@edgeble.ai&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
We have common ddr types in rockchip or in general. So use
the common ddr type names instead of per Rockchip SoC to
avoid confusion.

The respective ddr type names will use on the associated
ddr SoC driver as these drivers are built per SoC at a time.

Signed-off-by: Jagan Teki &lt;jagan@edgeble.ai&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rockchip: fix typo in KConfig option label</title>
<updated>2022-10-19T11:30:48+00:00</updated>
<author>
<name>Quentin Schulz</name>
<email>quentin.schulz@theobroma-systems.com</email>
</author>
<published>2022-09-15T10:17:10+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d842b561bb7ad214935918063d0742c76a589fbe'/>
<id>d842b561bb7ad214935918063d0742c76a589fbe</id>
<content type='text'>
RAM_PX30_DDR4 is for DDR4 support and not DDR3 so let's fix the typo.

Fixes: 2db36c64bd5a ("ram: rockchip: px30: add a config-based ddr selection")
Cc: Quentin Schulz &lt;foss+uboot@0leil.net&gt;
Signed-off-by: Quentin Schulz &lt;quentin.schulz@theobroma-systems.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
RAM_PX30_DDR4 is for DDR4 support and not DDR3 so let's fix the typo.

Fixes: 2db36c64bd5a ("ram: rockchip: px30: add a config-based ddr selection")
Cc: Quentin Schulz &lt;foss+uboot@0leil.net&gt;
Signed-off-by: Quentin Schulz &lt;quentin.schulz@theobroma-systems.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rockchip: px30: add a config-based ddr selection</title>
<updated>2020-10-30T10:11:29+00:00</updated>
<author>
<name>Heiko Stuebner</name>
<email>heiko.stuebner@theobroma-systems.com</email>
</author>
<published>2020-10-01T18:40:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2db36c64bd5a8910112708c1c6b68bd3594517d3'/>
<id>2db36c64bd5a8910112708c1c6b68bd3594517d3</id>
<content type='text'>
The SRAM on the PX30 is not big enough to hold multiple DDR configs
so it needs to be selected during build.

So far simply the DDR3 config was always selected and getting DDR4
or LPDDR2/3 initialized would require a code modification.

So add Kconfig options similar to RK3399 to allow selecting the DDR4
and LPDDR2/3 options instead, while DDR3 stays the default as before.

Signed-off-by: Heiko Stuebner &lt;heiko.stuebner@theobroma-systems.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Kever Yang&lt;kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
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<pre>
The SRAM on the PX30 is not big enough to hold multiple DDR configs
so it needs to be selected during build.

So far simply the DDR3 config was always selected and getting DDR4
or LPDDR2/3 initialized would require a code modification.

So add Kconfig options similar to RK3399 to allow selecting the DDR4
and LPDDR2/3 options instead, while DDR3 stays the default as before.

Signed-off-by: Heiko Stuebner &lt;heiko.stuebner@theobroma-systems.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Kever Yang&lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rockchip: Fix Kconfig dependency for RAM_ROCKCHIP_DEBUG</title>
<updated>2020-02-13T15:10:50+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2020-02-13T07:29:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e3dc5924ca07d91cb8dbad507515255bc26c5434'/>
<id>e3dc5924ca07d91cb8dbad507515255bc26c5434</id>
<content type='text'>
There is no reason to show RAM_ROCKCHIP_DEBUG entry in other .config files
as I see it for Xilinx ZynqMP.

\# CONFIG_U_QE is not set
\# CONFIG_RAM is not set
CONFIG_RAM_ROCKCHIP_DEBUG=y

Add missing dependency on RAM_ROCKCHIP driver.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
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<pre>
There is no reason to show RAM_ROCKCHIP_DEBUG entry in other .config files
as I see it for Xilinx ZynqMP.

\# CONFIG_U_QE is not set
\# CONFIG_RAM is not set
CONFIG_RAM_ROCKCHIP_DEBUG=y

Add missing dependency on RAM_ROCKCHIP driver.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rk3399: migrate to use common code</title>
<updated>2019-11-17T08:23:56+00:00</updated>
<author>
<name>YouMin Chen</name>
<email>cym@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a922d0d102750f287283e33cf364c37f79e1a361'/>
<id>a922d0d102750f287283e33cf364c37f79e1a361</id>
<content type='text'>
For there are some structures and functions are common for all rockchip SoCs,
migrate to use the common code so that we can clean up reduandent codes.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
For there are some structures and functions are common for all rockchip SoCs,
migrate to use the common code so that we can clean up reduandent codes.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rockchip: Default enable DRAM debug info</title>
<updated>2019-11-17T08:23:56+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fba7bd4c34c52a699df9e49ee753316dab1df305'/>
<id>fba7bd4c34c52a699df9e49ee753316dab1df305</id>
<content type='text'>
The debug info for dram is main about the capacity related info which is
very important the board init, so set this default enable.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
The debug info for dram is main about the capacity related info which is
very important the board init, so set this default enable.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rockchip: add common code for sdram driver</title>
<updated>2019-11-17T08:23:56+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2019-11-15T03:04:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d6647b08b276b8c5bacfe2dc10ec91a6a4503a9e'/>
<id>d6647b08b276b8c5bacfe2dc10ec91a6a4503a9e</id>
<content type='text'>
There are some function like os_reg setting, capacity detect functions,
can be used as common code for different Rockchip SoCs, add a
sdram_common.c for all these functions.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
There are some function like os_reg setting, capacity detect functions,
can be used as common code for different Rockchip SoCs, add a
sdram_common.c for all these functions.

Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rockchip: Kconfig: Add RK3399 LPDDR4 entry</title>
<updated>2019-07-20T15:59:44+00:00</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2019-07-16T11:57:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b6cf08949d4d8ff0940c0663ae1d978737705205'/>
<id>b6cf08949d4d8ff0940c0663ae1d978737705205</id>
<content type='text'>
Supporting LPDDR4 code support in RK3399 would increases
the size of SPL/TPL.

So add kconfig entry for RK3399 LPDDR4 code so-that
the boards have LPDDR4 can enable them via defconfig.

Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Kever Yang &lt;Kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Supporting LPDDR4 code support in RK3399 would increases
the size of SPL/TPL.

So add kconfig entry for RK3399 LPDDR4 code so-that
the boards have LPDDR4 can enable them via defconfig.

Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Kever Yang &lt;Kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rockchip: Add debug sdram driver</title>
<updated>2019-07-19T03:11:09+00:00</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2019-07-15T18:28:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=07112672a57adcbdc8272283f631c1648245c1f8'/>
<id>07112672a57adcbdc8272283f631c1648245c1f8</id>
<content type='text'>
Add sdram driver to handle debug across rockchip SoCs.

This would help to improve code debugging feature for
sdram drivers in rockchip family, whoever wants to
debug the driver should call these core debug code on
their respective platform sdram drivers.

Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Reviewed-by: Kever Yang &lt;Kever.yang@rock-chips.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add sdram driver to handle debug across rockchip SoCs.

This would help to improve code debugging feature for
sdram drivers in rockchip family, whoever wants to
debug the driver should call these core debug code on
their respective platform sdram drivers.

Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Signed-off-by: YouMin Chen &lt;cym@rock-chips.com&gt;
Reviewed-by: Kever Yang &lt;Kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
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