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<title>u-boot.git/drivers/ram/thead, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>ram: thead: Add initial DDR controller support for TH1520</title>
<updated>2025-05-21T08:49:52+00:00</updated>
<author>
<name>Yao Zi</name>
<email>ziyao@disroot.org</email>
</author>
<published>2025-05-13T09:04:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=05240d541a407fbb62eec43f40a2b831bb1c1fe0'/>
<id>05240d541a407fbb62eec43f40a2b831bb1c1fe0</id>
<content type='text'>
This patch cleans the vendor code of DDR initialization up, converts the
driver to fit in DM framework and use a firmware[1] packaged by binman to
ship PHY configuration.

Currently the driver is only capable of initializing the controller to
work with dual-rank 3733MHz LPDDR4, which is shipped by 16GiB variants
of LicheePi 4A boards and I could test with. Support for other
configurations could be easily added later.

Link: https://github.com/ziyao233/th1520-firmware # [1]
Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
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<pre>
This patch cleans the vendor code of DDR initialization up, converts the
driver to fit in DM framework and use a firmware[1] packaged by binman to
ship PHY configuration.

Currently the driver is only capable of initializing the controller to
work with dual-rank 3733MHz LPDDR4, which is shipped by 16GiB variants
of LicheePi 4A boards and I could test with. Support for other
configurations could be easily added later.

Link: https://github.com/ziyao233/th1520-firmware # [1]
Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</pre>
</div>
</content>
</entry>
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