<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/ram, branch v2017.11-rc1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/ram?h=v2017.11-rc1</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/ram?h=v2017.11-rc1'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2017-09-30T22:33:32Z</updated>
<entry>
<title>rockchip: rk3188: ram: add support for 16bit row address</title>
<updated>2017-09-30T22:33:32Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-09-25T08:33:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a27290a6f892421d335ffbdd5b8724135132b991'/>
<id>urn:sha1:a27290a6f892421d335ffbdd5b8724135132b991</id>
<content type='text'>
RK3188 using the same ddr_conf for both 15 bit and 16 bit row address.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
[Fixed compile-error by declaring 'row':]
Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk322x: add sdram driver</title>
<updated>2017-09-30T22:33:32Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-09-27T08:38:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0176399b79330ffecb9a18fa392ec7e48a7b6a58'/>
<id>urn:sha1:0176399b79330ffecb9a18fa392ec7e48a7b6a58</id>
<content type='text'>
Add driver for rk322x to support sdram initialize in SPL.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3328: move sdram driver to driver/ram</title>
<updated>2017-09-30T22:33:31Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-09-27T08:11:33Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f0768491db98249b3f54f16dd99a1d8dcdea9f2a'/>
<id>urn:sha1:f0768491db98249b3f54f16dd99a1d8dcdea9f2a</id>
<content type='text'>
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3288: move sdram driver to driver/ram</title>
<updated>2017-09-30T22:33:31Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-09-27T08:11:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c9eb7bca4b77523fb4a870208351af81a7f0ee67'/>
<id>urn:sha1:c9eb7bca4b77523fb4a870208351af81a7f0ee67</id>
<content type='text'>
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3188: move sdram driver to driver/ram</title>
<updated>2017-09-30T22:33:31Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-09-27T08:11:31Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5b67d7010b73a6e17b593f1f3af25dd06996830a'/>
<id>urn:sha1:5b67d7010b73a6e17b593f1f3af25dd06996830a</id>
<content type='text'>
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3399: move sdram driver to driver/ram</title>
<updated>2017-09-30T22:33:31Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-09-27T08:11:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b5934cf67cc3072f87b6c8a220b686b7d452b0b3'/>
<id>urn:sha1:b5934cf67cc3072f87b6c8a220b686b7d452b0b3</id>
<content type='text'>
Since we have CONFIG_RAM framwork and its driver folder, move the driver
into it.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3368: adjust DMC driver for 32/64bit-aware OF_PLATDATA</title>
<updated>2017-09-18T18:40:38Z</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-08-14T17:05:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1d70f0ac88dcd0ed9c17ec4c5e97db69de961319'/>
<id>urn:sha1:1d70f0ac88dcd0ed9c17ec4c5e97db69de961319</id>
<content type='text'>
With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the
OF_PLATDATA structure layout changes.  This adjusts the DMC driver for
the RK3368 to track these changes.

For the time being (i.e. until regmap_init_mem_platdata works for the
64bit case), we won't use regmap_init_mem_platdata here and simply
access of_plat.reg[] directly.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>ram: kconfig: s/SPL/TPL/ in TPL_RAM help text</title>
<updated>2017-08-26T18:56:06Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2017-08-25T14:46:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=93fd5b0ac185fd81d2e2c658a4dad4fc63f1a690'/>
<id>urn:sha1:93fd5b0ac185fd81d2e2c658a4dad4fc63f1a690</id>
<content type='text'>
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3368: add DRAM controller driver with DRAM initialisation</title>
<updated>2017-08-13T15:12:33Z</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-06-22T22:12:05Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=403e9cbcd5d2da3f5af0e67552c6ecc13a472830'/>
<id>urn:sha1:403e9cbcd5d2da3f5af0e67552c6ecc13a472830</id>
<content type='text'>
This adds a DRAM controller driver for the RK3368 and places it in
drivers/ram/rockchip (where the other DM-enabled DRAM controller
drivers for rockchip devices should also be moved eventually).

At this stage, only the following feature-set is supported:
 - DDR3
 - 32-bit configuration (i.e. fully populated)
 - dual-rank (i.e. no auto-detection of ranks)
 - DDR3-1600K speed-bin

This driver expects to run from a TPL stage that will later return to
the RK3368 BROM.  It communicates with later stages through the
os_reg2 in the pmugrf (i.e. using the same mechanism as Rockchip's DDR
init code).

Unlike other DMC drivers for RK32xx and RK33xx parts, the required
timings are calculated within the driver based on a target frequency
and a DDR3 speed-bin (only the DDR3-1600K speed-bin is support at this
time).

The RK3368 also has the DDRC0_CON0 (DDR ch. 0, control-register 0)
register for controlling the operation of its (single-channel) DRAM
controller in the GRF block.  This provides for selecting DDR3, mobile
DDR modes, and control low-power operation.
As part of this change, DDRC0_CON0 is also added to the GRF structure
definition (at offset 0x600).

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>spl: dm: Kconfig: introduce TPL_RAM (in analogy to SPL_RAM)</title>
<updated>2017-08-13T15:12:20Z</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-06-28T23:42:40Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c336c3c35f53d01fad0699237d5645440e454df6'/>
<id>urn:sha1:c336c3c35f53d01fad0699237d5645440e454df6</id>
<content type='text'>
To allow finer grained selection of features for TPL, we introduce
TPL_RAM (in analogy to SPL_RAM).

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
</feed>
